Vikranth Vemulapalli

Person

Folsom, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multiple register allocation sizes for threads
- Patent number 12,210,905
- Issue date Jan 28, 2025
- Intel Corporation
- Chandra Gurram
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for improving cache efficiency and utilization
- Patent number 12,210,477
- Issue date Jan 28, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enabling product SKUs based on chiplet configurations
- Patent number 12,141,890
- Issue date Nov 12, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalar core integration
- Patent number 12,117,962
- Issue date Oct 15, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disaggregation of system-on-chip (SOC) architecture
- Patent number 12,112,398
- Issue date Oct 8, 2024
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disaggregation of system-on-chip (SOC) architecture
- Patent number 12,056,789
- Issue date Aug 6, 2024
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Stack access throttling for synchronous ray tracing
- Patent number 12,045,658
- Issue date Jul 23, 2024
- Intel Corporation
- Pawel Majewski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data prefetching for graphics data processing
- Patent number 11,892,950
- Issue date Feb 6, 2024
- Intel Corporation
- Vikranth Vemulapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disaggregation of system-on-chip (SOC) architecture
- Patent number 11,763,416
- Issue date Sep 19, 2023
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalar core integration
- Patent number 11,762,804
- Issue date Sep 19, 2023
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disaggregation of system-on-chip (SOC) architecture
- Patent number 11,756,150
- Issue date Sep 12, 2023
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Thread group scheduling for graphics processing
- Patent number 11,709,714
- Issue date Jul 25, 2023
- Intel Corporation
- Ben Ashbaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sparse optimizations for a matrix accelerator architecture
- Patent number 11,676,239
- Issue date Jun 13, 2023
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for improving cache efficiency and utilization
- Patent number 11,620,256
- Issue date Apr 4, 2023
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Preemptive page fault handling
- Patent number 11,416,411
- Issue date Aug 16, 2022
- Intel Corporation
- Murali Ramadoss
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalar core integration
- Patent number 11,409,693
- Issue date Aug 9, 2022
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data prefetching for graphics data processing
- Patent number 11,409,658
- Issue date Aug 9, 2022
- Intel Corporation
- Vikranth Vemulapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disaggregation of System-On-Chip (SOC) architecture
- Patent number 11,410,266
- Issue date Aug 9, 2022
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enabling product SKUS based on chiplet configurations
- Patent number 11,386,521
- Issue date Jul 12, 2022
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Thread group scheduling for graphics processing
- Patent number 11,281,496
- Issue date Mar 22, 2022
- Intel Corporation
- Ben Ashbaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for minimally intrusive instruction pointer-aw...
- Patent number 11,210,094
- Issue date Dec 28, 2021
- Intel Corporation
- Michael Cole
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sparse optimizations for a matrix accelerator architecture
- Patent number 11,113,784
- Issue date Sep 7, 2021
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalar core integration
- Patent number 11,016,929
- Issue date May 25, 2021
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enabling product SKUs based on chiplet configurations
- Patent number 10,909,652
- Issue date Feb 2, 2021
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data prefetching for graphics data processing
- Patent number 10,909,039
- Issue date Feb 2, 2021
- Intel Corporation
- Vikranth Vemulapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disaggregation of SOC architecture
- Patent number 10,803,548
- Issue date Oct 13, 2020
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single input multiple data processing mechanism
- Patent number 10,769,751
- Issue date Sep 8, 2020
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single input multiple data processing mechanism
- Patent number 10,417,730
- Issue date Sep 17, 2019
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SCALAR CORE INTEGRATION
- Publication number 20250068588
- Publication date Feb 27, 2025
- Intel Corporation
- JOYDEEP RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISAGGREGATION OF SYSTEM-ON-CHIP (SOC) ARCHITECTURE
- Publication number 20250061535
- Publication date Feb 20, 2025
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STACK ACCESS THROTTLING FOR SYNCHRONOUS RAY TRACING
- Publication number 20250053452
- Publication date Feb 13, 2025
- Intel Corporation
- PAWEL MAJEWSKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PREFETCHING FOR GRAPHICS DATA PROCESSING
- Publication number 20240256456
- Publication date Aug 1, 2024
- Intel Corporation
- Vikranth Vemulapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SUPPORTING AND LOAD BALANCING MULTIPLE DOUBLE PRECISION PIPELINES I...
- Publication number 20240168764
- Publication date May 23, 2024
- Intel Corporation
- Supratim Pal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INCREASING PROCESSING RESOURCES IN PROCESSING CORES OF A GRAPHICS E...
- Publication number 20240160478
- Publication date May 16, 2024
- Intel Corporation
- Jiasheng Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALAR CORE INTEGRATION
- Publication number 20240045830
- Publication date Feb 8, 2024
- Intel Corporation
- JOYDEEP RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THREAD GROUP SCHEDULING FOR GRAPHICS PROCESSING
- Publication number 20240028404
- Publication date Jan 25, 2024
- Intel Corporation
- Ben Ashbaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISAGGREGATION OF SYSTEM-ON-CHIP (SOC) ARCHITECTURE
- Publication number 20240013338
- Publication date Jan 11, 2024
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISAGGREGATION OF SYSTEM-ON-CHIP (SOC) ARCHITECTURE
- Publication number 20240005443
- Publication date Jan 4, 2024
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STACK ACCESS THROTTLING FOR SYNCHRONOUS RAY TRACING
- Publication number 20230359496
- Publication date Nov 9, 2023
- Intel Corporation
- PAWEL MAJEWSKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPARSE OPTIMIZATIONS FOR A MATRIX ACCELERATOR ARCHITECTURE
- Publication number 20230351543
- Publication date Nov 2, 2023
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GATHERING PAYLOAD FROM ARBITRARY REGISTERS FOR SEND MESSAGES IN A G...
- Publication number 20230088743
- Publication date Mar 23, 2023
- Intel Corporation
- Supratim Pal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PREFETCHING FOR GRAPHICS DATA PROCESSING
- Publication number 20230051190
- Publication date Feb 16, 2023
- Intel Corporation
- Vikranth Vemulapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALAR CORE INTEGRATION
- Publication number 20230029176
- Publication date Jan 26, 2023
- Intel Corporation
- JOYDEEP RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE REGISTER ALLOCATION SIZES FOR THREADS
- Publication number 20220413916
- Publication date Dec 29, 2022
- Intel Corporation
- Chandra Gurram
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH PERFORMANCE CONSTANT CACHE AND CONSTANT ACCESS MECHANISMS
- Publication number 20220308877
- Publication date Sep 29, 2022
- Intel Corporation
- Subramaniam MAIYURAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR IMPROVING CACHE EFFICIENCY AND UTILIZATION
- Publication number 20220261347
- Publication date Aug 18, 2022
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THREAD GROUP SCHEDULING FOR GRAPHICS PROCESSING
- Publication number 20220261289
- Publication date Aug 18, 2022
- Intel Corporation
- Ben Ashbaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENABLING PRODUCT SKUS BASED ON CHIPLET CONFIGURATIONS
- Publication number 20220188967
- Publication date Jun 16, 2022
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR IMPROVING CACHE EFFICIENCY AND UTILIZATION
- Publication number 20220179787
- Publication date Jun 9, 2022
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISAGGREGATION OF SYSTEM-ON-CHIP (SOC) ARCHITECTURE
- Publication number 20220180468
- Publication date Jun 9, 2022
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR MINIMALLY INTRUSIVE INSTRUCTION POINTER-AW...
- Publication number 20220156068
- Publication date May 19, 2022
- Intel Corporation
- Michael Cole
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISAGGREGATION OF SYSTEM-ON-CHIP (SOC) ARCHITECTURE
- Publication number 20220036500
- Publication date Feb 3, 2022
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPARSE OPTIMIZATIONS FOR A MATRIX ACCELERATOR ARCHITECTURE
- Publication number 20210374897
- Publication date Dec 2, 2021
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALAR CORE INTEGRATION
- Publication number 20210349848
- Publication date Nov 11, 2021
- Intel Corporation
- JOYDEEP RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PREFETCHING FOR GRAPHICS DATA PROCESSING
- Publication number 20210255957
- Publication date Aug 19, 2021
- Intel Corporation
- Vikranth Vemulapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENABLING PRODUCT SKUS BASED ON CHIPLET CONFIGURATIONS
- Publication number 20210256654
- Publication date Aug 19, 2021
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISAGGREGATION OF SOC ARCHITECTURE
- Publication number 20210133913
- Publication date May 6, 2021
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR MINIMALLY INTRUSIVE INSTRUCTION POINTER-AW...
- Publication number 20210096855
- Publication date Apr 1, 2021
- Intel Corporation
- Michael Cole
- G06 - COMPUTING CALCULATING COUNTING

Vikranth Vemulapalli

Person

Patents Grantslast 30 patents

Multiple register allocation sizes for threads

Systems and methods for improving cache efficiency and utilization

Enabling product SKUs based on chiplet configurations

Scalar core integration

Disaggregation of system-on-chip (SOC) architecture

Disaggregation of system-on-chip (SOC) architecture

Stack access throttling for synchronous ray tracing

Data prefetching for graphics data processing

Disaggregation of system-on-chip (SOC) architecture

Scalar core integration

Disaggregation of system-on-chip (SOC) architecture

Thread group scheduling for graphics processing

Sparse optimizations for a matrix accelerator architecture

Systems and methods for improving cache efficiency and utilization

Preemptive page fault handling

Scalar core integration

Data prefetching for graphics data processing

Disaggregation of System-On-Chip (SOC) architecture

Enabling product SKUS based on chiplet configurations

Thread group scheduling for graphics processing

Method and apparatus for minimally intrusive instruction pointer-aw...

Sparse optimizations for a matrix accelerator architecture

Scalar core integration

Enabling product SKUs based on chiplet configurations

Data prefetching for graphics data processing

Disaggregation of SOC architecture

Single input multiple data processing mechanism

Single input multiple data processing mechanism

Patents Applicationslast 30 patents

SCALAR CORE INTEGRATION

DISAGGREGATION OF SYSTEM-ON-CHIP (SOC) ARCHITECTURE

STACK ACCESS THROTTLING FOR SYNCHRONOUS RAY TRACING

DATA PREFETCHING FOR GRAPHICS DATA PROCESSING

SUPPORTING AND LOAD BALANCING MULTIPLE DOUBLE PRECISION PIPELINES I...

INCREASING PROCESSING RESOURCES IN PROCESSING CORES OF A GRAPHICS E...

SCALAR CORE INTEGRATION

THREAD GROUP SCHEDULING FOR GRAPHICS PROCESSING

DISAGGREGATION OF SYSTEM-ON-CHIP (SOC) ARCHITECTURE

DISAGGREGATION OF SYSTEM-ON-CHIP (SOC) ARCHITECTURE

STACK ACCESS THROTTLING FOR SYNCHRONOUS RAY TRACING

SPARSE OPTIMIZATIONS FOR A MATRIX ACCELERATOR ARCHITECTURE

GATHERING PAYLOAD FROM ARBITRARY REGISTERS FOR SEND MESSAGES IN A G...

DATA PREFETCHING FOR GRAPHICS DATA PROCESSING

SCALAR CORE INTEGRATION

MULTIPLE REGISTER ALLOCATION SIZES FOR THREADS

HIGH PERFORMANCE CONSTANT CACHE AND CONSTANT ACCESS MECHANISMS

SYSTEMS AND METHODS FOR IMPROVING CACHE EFFICIENCY AND UTILIZATION

THREAD GROUP SCHEDULING FOR GRAPHICS PROCESSING

ENABLING PRODUCT SKUS BASED ON CHIPLET CONFIGURATIONS

SYSTEMS AND METHODS FOR IMPROVING CACHE EFFICIENCY AND UTILIZATION

DISAGGREGATION OF SYSTEM-ON-CHIP (SOC) ARCHITECTURE

METHOD AND APPARATUS FOR MINIMALLY INTRUSIVE INSTRUCTION POINTER-AW...

DISAGGREGATION OF SYSTEM-ON-CHIP (SOC) ARCHITECTURE

SPARSE OPTIMIZATIONS FOR A MATRIX ACCELERATOR ARCHITECTURE

SCALAR CORE INTEGRATION

DATA PREFETCHING FOR GRAPHICS DATA PROCESSING

ENABLING PRODUCT SKUS BASED ON CHIPLET CONFIGURATIONS

DISAGGREGATION OF SOC ARCHITECTURE

METHOD AND APPARATUS FOR MINIMALLY INTRUSIVE INSTRUCTION POINTER-AW...