Vinayak Bhat

Person

Bangalore, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Delayed thermal throttling and associated data routing techniques
- Patent number 11,892,928
- Issue date Feb 6, 2024
- Western Digital Technologies, Inc.
- Vinayak Bhat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of handling irregular MetaBlock wear leveling and UGSD boot...
- Patent number 11,842,062
- Issue date Dec 12, 2023
- Western Digital Technologies, Inc.
- Kalpit Bordia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic XOR bin mapping in memory devices
- Patent number 11,822,814
- Issue date Nov 21, 2023
- Western Digital Technologies, Inc.
- Shrinidhi Srikanth Kulkarni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile storage system with hybrid SLC wear leveling
- Patent number 11,798,643
- Issue date Oct 24, 2023
- Western Digital Technologies, Inc.
- Vinayak Bhat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modified distribution of memory device states
- Patent number 11,776,639
- Issue date Oct 3, 2023
- Western Digital Technologies, Inc.
- Amiya Banerjee
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for improving word line data retention for memory...
- Patent number 11,721,402
- Issue date Aug 8, 2023
- Western Digital Technologies, Inc.
- Amiya Banerjee
- G11 - INFORMATION STORAGE
Information Patent Grant
Pre-erasure of memory in storage devices
- Patent number 11,698,745
- Issue date Jul 11, 2023
- Western Digital Technologies, Inc.
- Shrinidhi Kulkarni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write abort error detection in multi-pass programming
- Patent number 11,663,068
- Issue date May 30, 2023
- Western Digital Technologies, Inc.
- Amiya Banerjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enhanced word line stripe erase abort detection
- Patent number 11,557,348
- Issue date Jan 17, 2023
- Western Digital Technologies, Inc.
- Vinayak Bhat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decreasing physical secure erase times in solid state drives
- Patent number 11,543,992
- Issue date Jan 3, 2023
- Western Digital Technologies, Inc.
- Vinayak Bhat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modified distribution of memory device states
- Patent number 11,462,279
- Issue date Oct 4, 2022
- Western Digital Technologies, Inc.
- Amiya Banerjee
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for improving word line data retention for memory...
- Patent number 11,386,969
- Issue date Jul 12, 2022
- Western Digital Technologies, Inc.
- Amiya Banerjee
- G11 - INFORMATION STORAGE
Information Patent Grant
Data-assisted LDPC decoding
- Patent number 11,159,176
- Issue date Oct 26, 2021
- Western Digital Technologies, Inc.
- Abhinandan Venugopal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for dynamic and configurable L2/L3 data—plane in...
- Patent number 10,044,614
- Issue date Aug 7, 2018
- TEJAS NETWORKS LIMITED
- Vinayak Bhat
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
NON-VOLATILE STORAGE SYSTEM WITH HYBRID SLC WEAR LEVELING
- Publication number 20230317185
- Publication date Oct 5, 2023
- Western Digital Technologies, Inc.
- Vinayak Bhat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC XOR BIN MAPPING IN MEMORY DEVICES
- Publication number 20230273745
- Publication date Aug 31, 2023
- Western Digital Technologies, Inc.
- Shrinidhi Srikanth Kulkarni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method Of Handling Irregular MetaBlock Wear Leveling And UGSD Boot...
- Publication number 20230251788
- Publication date Aug 10, 2023
- Western Digital Technologies, Inc.
- Kalpit BORDIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Modified Distribution of Memory Device States
- Publication number 20230021663
- Publication date Jan 26, 2023
- Western Digital Technologies, Inc.
- Amiya Banerjee
- G11 - INFORMATION STORAGE
Information Patent Application
Enhanced Word Line Stripe Erase Abort Detection
- Publication number 20220415403
- Publication date Dec 29, 2022
- Western Digital Technologies, Inc.
- Vinayak Bhat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Pre-Erasure of Memory in Storage Devices
- Publication number 20220317914
- Publication date Oct 6, 2022
- Western Digital Technologies, Inc.
- Shrinidhi Kulkarni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and System for Improving Word Line Data Retention for Memory...
- Publication number 20220301645
- Publication date Sep 22, 2022
- Western Digital Technologies, Inc.
- Amiya Banerjee
- G11 - INFORMATION STORAGE
Information Patent Application
Data Routing Techniques to Delay Thermal Throttling
- Publication number 20220206920
- Publication date Jun 30, 2022
- Western Digital Technologies, Inc.
- Vinayak Bhat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Decreasing Physical Secure Erase Times in Solid State Drives
- Publication number 20220179578
- Publication date Jun 9, 2022
- Western Digital Technologies, Inc.
- Vinayak Bhat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Write Abort Error Detection in Multi-Pass Programming
- Publication number 20210406107
- Publication date Dec 30, 2021
- Western Digital Technologies, Inc.
- Amiya Banerjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Relocation of Data in Memory At Different Transfer Rates Based on T...
- Publication number 20210132817
- Publication date May 6, 2021
- Western Digital Technologies, Inc.
- Vinayak Bhat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR DYNAMIC AND CONFIGURABLE L2/L3 DATA-PLANE IN...
- Publication number 20150281131
- Publication date Oct 1, 2015
- TEJAS NETWORKS LIMITED
- VINAYAK BHAT
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Vinayak Bhat

Person

Patents Grantslast 30 patents

Delayed thermal throttling and associated data routing techniques

Method of handling irregular MetaBlock wear leveling and UGSD boot...

Dynamic XOR bin mapping in memory devices

Non-volatile storage system with hybrid SLC wear leveling

Modified distribution of memory device states

Method and system for improving word line data retention for memory...

Pre-erasure of memory in storage devices

Write abort error detection in multi-pass programming

Enhanced word line stripe erase abort detection

Decreasing physical secure erase times in solid state drives

Modified distribution of memory device states

Method and system for improving word line data retention for memory...

Data-assisted LDPC decoding

System and method for dynamic and configurable L2/L3 data—plane in...

Patents Applicationslast 30 patents

NON-VOLATILE STORAGE SYSTEM WITH HYBRID SLC WEAR LEVELING

DYNAMIC XOR BIN MAPPING IN MEMORY DEVICES

Method Of Handling Irregular MetaBlock Wear Leveling And UGSD Boot...

Modified Distribution of Memory Device States

Enhanced Word Line Stripe Erase Abort Detection

Pre-Erasure of Memory in Storage Devices

Method and System for Improving Word Line Data Retention for Memory...

Data Routing Techniques to Delay Thermal Throttling

Decreasing Physical Secure Erase Times in Solid State Drives

Write Abort Error Detection in Multi-Pass Programming

Relocation of Data in Memory At Different Transfer Rates Based on T...

SYSTEM AND METHOD FOR DYNAMIC AND CONFIGURABLE L2/L3 DATA-PLANE IN...