Vincent Cave

Person

Hillsboro, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory system architecture for multi-threaded processors
- Patent number 11,630,691
- Issue date Apr 18, 2023
- Intel Corporation
- Robert Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multithreaded processor core with hardware-assisted task scheduling
- Patent number 11,360,809
- Issue date Jun 14, 2022
- Intel Corporation
- William Paul Griffin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system architecture for multi-threaded processors
- Patent number 11,106,494
- Issue date Aug 31, 2021
- Intel Corporation
- Robert Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for barrier synchronization in a multi...
- Patent number 11,061,742
- Issue date Jul 13, 2021
- Intel Corporation
- Robert Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-processor system with configurable cache sub-domains and cros...
- Patent number 10,795,819
- Issue date Oct 6, 2020
- Intel Corporation
- Robert Pawlowski
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
APPARATUS AND METHOD FOR PER-USER SECURE ACCESS CONTROL WITH FINE G...
- Publication number 20250200163
- Publication date Jun 19, 2025
- Intel Corporation
- Gurpreet Singh KALSI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR RECONCILING CONFLICTING CACHELINE MODIFICA...
- Publication number 20250173149
- Publication date May 29, 2025
- Intel Corporation
- Vincent CAVE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OFFLOADING FUNCTION STREAMS
- Publication number 20250110918
- Publication date Apr 3, 2025
- Intel Corporation
- Robert PAWLOWSKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMICALLY RECONFIGURABLE PROCESSING CORE
- Publication number 20240069921
- Publication date Feb 29, 2024
- Intel Corporation
- Scott Cline
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LARGE-SCALE MATRIX RESTRUCTURING AND MATRIX-SCALAR OPERATIONS
- Publication number 20220100508
- Publication date Mar 31, 2022
- Intel Corporation
- Robert Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IN-NETWORK MULTICAST OPERATIONS
- Publication number 20210409265
- Publication date Dec 30, 2021
- Intel Corporation
- Robert PAWLOWSKI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MEMORY SYSTEM ARCHITECTURE FOR MULTI-THREADED PROCESSORS
- Publication number 20210389984
- Publication date Dec 16, 2021
- Intel Corporation
- Robert PAWLOWSKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE SUPPORT FOR DUAL-MEMORY ATOMIC OPERATIONS
- Publication number 20200401412
- Publication date Dec 24, 2020
- Intel Corporation
- Robert PAWLOWSKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM ARCHITECTURE FOR MULTI-THREADED PROCESSORS
- Publication number 20200104164
- Publication date Apr 2, 2020
- Intel Corporation
- Robert PAWLOWSKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM, APPARATUS AND METHOD FOR BARRIER SYNCHRONIZATION IN A MULTI...
- Publication number 20200004602
- Publication date Jan 2, 2020
- Intel Corporation
- Robert Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTITHREADED PROCESSOR CORE WITH HARDWARE-ASSISTED TASK SCHEDULING
- Publication number 20200004587
- Publication date Jan 2, 2020
- Intel Corporation
- Paul Griffin
- G06 - COMPUTING CALCULATING COUNTING

Vincent Cave

Person

Patents Grantslast 30 patents

Memory system architecture for multi-threaded processors

Multithreaded processor core with hardware-assisted task scheduling

Memory system architecture for multi-threaded processors

System, apparatus and method for barrier synchronization in a multi...

Multi-processor system with configurable cache sub-domains and cros...

Patents Applicationslast 30 patents

APPARATUS AND METHOD FOR PER-USER SECURE ACCESS CONTROL WITH FINE G...

APPARATUS AND METHOD FOR RECONCILING CONFLICTING CACHELINE MODIFICA...

OFFLOADING FUNCTION STREAMS

DYNAMICALLY RECONFIGURABLE PROCESSING CORE

LARGE-SCALE MATRIX RESTRUCTURING AND MATRIX-SCALAR OPERATIONS

IN-NETWORK MULTICAST OPERATIONS

MEMORY SYSTEM ARCHITECTURE FOR MULTI-THREADED PROCESSORS

HARDWARE SUPPORT FOR DUAL-MEMORY ATOMIC OPERATIONS

MEMORY SYSTEM ARCHITECTURE FOR MULTI-THREADED PROCESSORS

SYSTEM, APPARATUS AND METHOD FOR BARRIER SYNCHRONIZATION IN A MULTI...

MULTITHREADED PROCESSOR CORE WITH HARDWARE-ASSISTED TASK SCHEDULING