Vincent Huard

Person

Meylan, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Method for estimating an operating profile of an integrated circuit...
- Patent number 10,634,715
- Issue date Apr 28, 2020
- STMicroelectronics (Crolles 2) SAS
- Vincent Huard
- G01 - MEASURING TESTING
Information Patent Grant
Flip flop of a digital electronic chip
- Patent number 10,585,143
- Issue date Mar 10, 2020
- STMicroelectronics International N.V.
- Pascal Urard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for adjusting at least one operating point of at least one i...
- Patent number 10,514,749
- Issue date Dec 24, 2019
- STMicroelectonics (Crolles 2) SAS
- Vincent Huard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for estimating an operating profile of an integrated circuit...
- Patent number 10,302,693
- Issue date May 28, 2019
- STMicroelectronics (Crolles 2) SAS
- Vincent Huard
- G01 - MEASURING TESTING
Information Patent Grant
Method and circuit for integrated circuit body biasing
- Patent number 10,050,037
- Issue date Aug 14, 2018
- STMicroelectronics S.A.
- Florian Cacho
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Compensation for electric drifts of MOS transistors
- Patent number RE44922
- Issue date Jun 3, 2014
- STMicroelectronics Crolles 2 SAS
- Mickael Denais
- 327 - Miscellaneous active electrical nonlinear devices, circuits, and systems
Information Patent Grant
Digital electronic device and method of altering clock delays in a...
- Patent number 8,022,741
- Issue date Sep 20, 2011
- NXP B.V.
- Vincent Huard
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Compensation for electric drifts of MOS transistors
- Patent number 7,498,863
- Issue date Mar 3, 2009
- STMicroelectronics Crolles 2 SAS
- Mickael Denais
- G05 - CONTROLLING REGULATING

Patents Applicationslast 30 patents

Information Patent Application
METHOD FOR ESTIMATING AN OPERATING PROFILE OF AN INTEGRATED CIRCUIT...
- Publication number 20190285694
- Publication date Sep 19, 2019
- STMicroelectronics (Crolles 2) SAS
- Vincent Huard
- G01 - MEASURING TESTING
Information Patent Application
FLIP FLOP OF A DIGITAL ELECTRONIC CHIP
- Publication number 20190018062
- Publication date Jan 17, 2019
- STMicroelectronics S.A.
- Pascal URARD
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND CIRCUIT FOR INTEGRATED CIRCUIT BODY BIASING
- Publication number 20180323196
- Publication date Nov 8, 2018
- STMicroelectronics S.A.
- Florian Cacho
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND CIRCUIT FOR INTEGRATED CIRCUIT BODY BIASING
- Publication number 20180130803
- Publication date May 10, 2018
- STMicroelectronics S.A.
- Florian Cacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR ADJUSTING AT LEAST ONE OPERATING POINT OF AT LEAST ONE I...
- Publication number 20180039320
- Publication date Feb 8, 2018
- STMicroelectronics (Crolles 2) SAS
- Vincent Huard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR ESTIMATING AN OPERATING PROFILE OF AN INTEGRATED CIRCUIT...
- Publication number 20180038907
- Publication date Feb 8, 2018
- STMicroelectronics (Crolles 2) SAS
- Vincent Huard
- G01 - MEASURING TESTING
Information Patent Application
HETEROJUNCTION BIPOLAR TRANSISTOR RELIABILITY SIMULATION METHOD
- Publication number 20150142410
- Publication date May 21, 2015
- STMicroelectronics S.A.
- Salim Ighilahriz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND DEVICE FOR MEASURING THE RELIABILITY OF AN INTEGRATED CI...
- Publication number 20120062268
- Publication date Mar 15, 2012
- STMICROELECTRONICS PVT. LTD.
- Remy Chevallier
- G01 - MEASURING TESTING
Information Patent Application
DIGITAL ELECTRONIC DEVICE AND METHOD OF ALTERING CLOCK DELAYS IN A...
- Publication number 20100231276
- Publication date Sep 16, 2010
- NXP, B.V.
- Vincent Huard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPENSATION FOR ELECTRIC DRIFTS OF MOS TRANSISTORS
- Publication number 20070057688
- Publication date Mar 15, 2007
- STMicroelectronics CROLLES 2 SAS
- Mickael Denais
- G05 - CONTROLLING REGULATING

Vincent Huard

Person

Patents Grantslast 30 patents

Method for estimating an operating profile of an integrated circuit...

Flip flop of a digital electronic chip

Method for adjusting at least one operating point of at least one i...

Method for estimating an operating profile of an integrated circuit...

Method and circuit for integrated circuit body biasing

Compensation for electric drifts of MOS transistors

Digital electronic device and method of altering clock delays in a...

Compensation for electric drifts of MOS transistors

Patents Applicationslast 30 patents

METHOD FOR ESTIMATING AN OPERATING PROFILE OF AN INTEGRATED CIRCUIT...

FLIP FLOP OF A DIGITAL ELECTRONIC CHIP

METHOD AND CIRCUIT FOR INTEGRATED CIRCUIT BODY BIASING

METHOD AND CIRCUIT FOR INTEGRATED CIRCUIT BODY BIASING

METHOD FOR ADJUSTING AT LEAST ONE OPERATING POINT OF AT LEAST ONE I...

METHOD FOR ESTIMATING AN OPERATING PROFILE OF AN INTEGRATED CIRCUIT...

HETEROJUNCTION BIPOLAR TRANSISTOR RELIABILITY SIMULATION METHOD

METHOD AND DEVICE FOR MEASURING THE RELIABILITY OF AN INTEGRATED CI...

DIGITAL ELECTRONIC DEVICE AND METHOD OF ALTERING CLOCK DELAYS IN A...

COMPENSATION FOR ELECTRIC DRIFTS OF MOS TRANSISTORS