Vineeth Mekkat

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
System, method, and apparatus for enhanced pointer identification a...
- Patent number 12,216,581
- Issue date Feb 4, 2025
- Intel Corporation
- Sreenivas Subramoney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, method, and apparatus for enhanced pointer identification a...
- Patent number 11,693,780
- Issue date Jul 4, 2023
- Intel Corporation
- Sreenivas Subramoney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, method, and apparatus for enhanced pointer identification a...
- Patent number 11,080,194
- Issue date Aug 3, 2021
- Intel Corporation
- Sreenivas Subramoney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shift-folding for efficient load coalescing in a binary translation...
- Patent number 10,915,320
- Issue date Feb 9, 2021
- Intel Corporation
- Vineeth Mekkat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for supporting speculative memory optimizations
- Patent number 10,853,078
- Issue date Dec 1, 2020
- Intel Corporation
- Vineeth Mekkat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Eliminating redundant stores using a protection designator and a cl...
- Patent number 10,540,178
- Issue date Jan 21, 2020
- Intel Corporation
- Vineeth Mekkat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid atomicity support for a binary translation based microprocessor
- Patent number 10,296,343
- Issue date May 21, 2019
- Intel Corporation
- Vineeth Mekkat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register reclamation
- Patent number 10,235,177
- Issue date Mar 19, 2019
- Intel Corporation
- Vineeth Mekkat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Supporting binary translation alias detection in an out-of-order pr...
- Patent number 10,228,956
- Issue date Mar 12, 2019
- Intel Corporation
- Vineeth Mekkat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Eliminating redundant store instructions from execution while maint...
- Patent number 10,120,686
- Issue date Nov 6, 2018
- Intel Corporation
- Vineeth Mekkat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for recovering from bad store-to-load forwardi...
- Patent number 9,996,356
- Issue date Jun 12, 2018
- Intel Corporation
- Vineeth Mekkat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to optimize instructions for execution by a p...
- Patent number 9,916,164
- Issue date Mar 13, 2018
- Intel Corporation
- Vineeth Mekkat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for memory aliasing detection in an out-of-ord...
- Patent number 9,710,389
- Issue date Jul 18, 2017
- Intel Corporation
- Oleg Margulis
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SYSTEM, METHOD, AND APPARATUS FOR ENHANCED POINTER IDENTIFICATION A...
- Publication number 20230409481
- Publication date Dec 21, 2023
- Intel Corporation
- Sreenivas Subramoney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM, METHOD, AND APPARATUS FOR ENHANCED POINTER IDENTIFICATION A...
- Publication number 20210365377
- Publication date Nov 25, 2021
- Intel Corporation
- Sreenivas Subramoney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Technology For Providing Memory Atomicity With Low Overhead
- Publication number 20200310798
- Publication date Oct 1, 2020
- Manjunath Shevgoor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM, METHOD, AND APPARATUS FOR ENHANCED POINTER IDENTIFICATION A...
- Publication number 20200210339
- Publication date Jul 2, 2020
- Intel Corporation
- Sreenivas Subramoney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHIFT-FOLDING FOR EFFICIENT LOAD COALESCING IN A BINARY TRANSLATION...
- Publication number 20200201632
- Publication date Jun 25, 2020
- Intel Corporation
- Vineeth MEKKAT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR SUPPORTING SPECULATIVE MEMORY OPTIMIZATIONS
- Publication number 20200201645
- Publication date Jun 25, 2020
- Intel Corporation
- Vineeth MEKKAT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID ATOMICITY SUPPORT FOR A BINARY TRANSLATION BASED MICROPROCESSOR
- Publication number 20180285112
- Publication date Oct 4, 2018
- Intel Corporation
- Vineeth Mekkat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SUPPORTING BINARY TRANSLATION ALIAS DETECTION IN AN OUT-OF-ORDER PR...
- Publication number 20180095765
- Publication date Apr 5, 2018
- Vineeth Mekkat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instruction and Logic for Dynamic Store Elimination
- Publication number 20180074827
- Publication date Mar 15, 2018
- Intel Corporation
- Vineeth Mekkat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REGISTER RECLAMATION
- Publication number 20180004524
- Publication date Jan 4, 2018
- Intel Corporation
- Vineeth Mekkat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instruction and Logic for Total Store Elimination
- Publication number 20170351516
- Publication date Dec 7, 2017
- Intel Corporation
- Vineeth Mekkat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Auxiliary Cache for Reducing Instruction Fetch and Decode Bandwidth...
- Publication number 20170286110
- Publication date Oct 5, 2017
- Intel Corporation
- Jason M. Agron
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for recovering from bad store-to-load forwardi...
- Publication number 20170185404
- Publication date Jun 29, 2017
- Vineeth Mekkat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO OPTIMIZE INSTRUCTIONS FOR EXECUTION BY A P...
- Publication number 20160364240
- Publication date Dec 15, 2016
- Intel Corporation
- Vineeth Mekkat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR MEMORY ALIASING DETECTION IN AN OUT-OF-ORD...
- Publication number 20160267009
- Publication date Sep 15, 2016
- Oleg Margulis
- G06 - COMPUTING CALCULATING COUNTING

Vineeth Mekkat

Person

Patents Grantslast 30 patents

System, method, and apparatus for enhanced pointer identification a...

System, method, and apparatus for enhanced pointer identification a...

System, method, and apparatus for enhanced pointer identification a...

Shift-folding for efficient load coalescing in a binary translation...

Method and apparatus for supporting speculative memory optimizations

Eliminating redundant stores using a protection designator and a cl...

Hybrid atomicity support for a binary translation based microprocessor

Register reclamation

Supporting binary translation alias detection in an out-of-order pr...

Eliminating redundant store instructions from execution while maint...

Method and apparatus for recovering from bad store-to-load forwardi...

Methods and apparatus to optimize instructions for execution by a p...

Method and apparatus for memory aliasing detection in an out-of-ord...

Patents Applicationslast 30 patents

SYSTEM, METHOD, AND APPARATUS FOR ENHANCED POINTER IDENTIFICATION A...

SYSTEM, METHOD, AND APPARATUS FOR ENHANCED POINTER IDENTIFICATION A...

Technology For Providing Memory Atomicity With Low Overhead

SYSTEM, METHOD, AND APPARATUS FOR ENHANCED POINTER IDENTIFICATION A...

SHIFT-FOLDING FOR EFFICIENT LOAD COALESCING IN A BINARY TRANSLATION...

METHOD AND APPARATUS FOR SUPPORTING SPECULATIVE MEMORY OPTIMIZATIONS

HYBRID ATOMICITY SUPPORT FOR A BINARY TRANSLATION BASED MICROPROCESSOR

SUPPORTING BINARY TRANSLATION ALIAS DETECTION IN AN OUT-OF-ORDER PR...

Instruction and Logic for Dynamic Store Elimination

REGISTER RECLAMATION

Instruction and Logic for Total Store Elimination

Auxiliary Cache for Reducing Instruction Fetch and Decode Bandwidth...

Method and apparatus for recovering from bad store-to-load forwardi...

METHODS AND APPARATUS TO OPTIMIZE INSTRUCTIONS FOR EXECUTION BY A P...

METHOD AND APPARATUS FOR MEMORY ALIASING DETECTION IN AN OUT-OF-ORD...