Vinh Quang Diep

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Adaptive sensing time for memory operations
- Patent number 12,237,015
- Issue date Feb 25, 2025
- Micron Technology, Inc.
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Grant
Bias voltage schemes during pre-programming and programming phases
- Patent number 12,217,801
- Issue date Feb 4, 2025
- Micron Technology, Inc.
- Vinh Q. Diep
- G11 - INFORMATION STORAGE
Information Patent Grant
Detrapping electrons to prevent quick charge loss during program ve...
- Patent number 11,967,387
- Issue date Apr 23, 2024
- Micron Technology, Inc.
- Ching-Huang Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Enhanced gradient seeding scheme during a program operation in a me...
- Patent number 11,901,010
- Issue date Feb 13, 2024
- Micron Technology, Inc.
- Vinh Q. Diep
- G11 - INFORMATION STORAGE
Information Patent Grant
Detrapping electrons to prevent quick charge loss during program ve...
- Patent number 11,508,449
- Issue date Nov 22, 2022
- Micron Technology, Inc.
- Ching-Huang Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-pass programming process for memory device which omits verify...
- Patent number 11,037,640
- Issue date Jun 15, 2021
- SanDisk Technologies LLC
- Ashish Baraskar
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with compensation for program speed variations due to...
- Patent number 11,024,387
- Issue date Jun 1, 2021
- SanDisk Technologies LLC
- Ching-Huang Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device with compensation for erase speed variations due to b...
- Patent number 10,923,197
- Issue date Feb 16, 2021
- SanDisk Technologies LLC
- Ching-Huang Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with compensation for program speed variations due to...
- Patent number 10,878,914
- Issue date Dec 29, 2020
- SanDisk Technologies LLC
- Ching-Huang Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-state programming in memory device with loop-dependent bit li...
- Patent number 10,854,300
- Issue date Dec 1, 2020
- SanDisk Technologies LLC
- Ching-Huang Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-pass programming process for memory device which omits verify...
- Patent number 10,811,109
- Issue date Oct 20, 2020
- SanDisk Technologies LLC
- Ashish Baraskar
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with compensation for erase speed variations due to b...
- Patent number 10,741,253
- Issue date Aug 11, 2020
- SanDisk Technologies LLC
- Ching-Huang Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-state programming in memory device with loop-dependent bit li...
- Patent number 10,706,941
- Issue date Jul 7, 2020
- SanDisk Technologies LLC
- Ching-Huang Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with compensation for program speed variations due to...
- Patent number 10,665,301
- Issue date May 26, 2020
- SanDisk Technologies LLC
- Ching-Huang Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device with reduced neighbor word line interference using ad...
- Patent number 10,636,501
- Issue date Apr 28, 2020
- SanDisk Technologies LLC
- Han-Ping Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Three dimensional NAND memory device with drain select gate electro...
- Patent number 10,566,059
- Issue date Feb 18, 2020
- SanDisk Technologies LLC
- Vinh Diep
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-pass programming with modified pass voltages to tighten thres...
- Patent number 10,510,413
- Issue date Dec 17, 2019
- SanDisk Technologies LLC
- Vinh Diep
- G11 - INFORMATION STORAGE
Information Patent Grant
Preventing refresh of voltages of dummy memory cells to reduce thre...
- Patent number 10,482,981
- Issue date Nov 19, 2019
- SanDisk Technologies LLC
- Ching-Huang Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Adjusting voltage on adjacent word line during verify of memory cel...
- Patent number 10,446,244
- Issue date Oct 15, 2019
- SanDisk Technologies LLC
- Vinh Diep
- G11 - INFORMATION STORAGE
Information Patent Grant
Early ramp down of dummy word line voltage during read to suppress...
- Patent number 10,276,248
- Issue date Apr 30, 2019
- SanDisk Technologies LLC
- Ching-Huang Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Channel pre-charge to suppress disturb of select gate transistors d...
- Patent number 10,068,651
- Issue date Sep 4, 2018
- SanDisk Technologies LLC
- Vinh Diep
- G11 - INFORMATION STORAGE
Information Patent Grant
Programming of dummy memory cell to reduce charge loss in select ga...
- Patent number 10,008,271
- Issue date Jun 26, 2018
- SanDisk Technologies LLC
- Vinh Diep
- G11 - INFORMATION STORAGE
Information Patent Grant
Reducing select gate injection disturb at the beginning of an erase...
- Patent number 9,922,705
- Issue date Mar 20, 2018
- SanDisk Technologies LLC
- Vinh Diep
- G11 - INFORMATION STORAGE
Information Patent Grant
Dummy word line control scheme for non-volatile memory
- Patent number 9,852,803
- Issue date Dec 26, 2017
- SanDisk Technologies LLC
- Vinh Quang Diep
- G11 - INFORMATION STORAGE
Information Patent Grant
Word line-dependent and temperature-dependent erase depth
- Patent number 9,830,963
- Issue date Nov 28, 2017
- SanDisk Technologies LLC
- Liang Pang
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
DRAIN-SIDE WORDLINE VOLTAGE BOOSTING TO REDUCE LATERAL ELECTRON FIE...
- Publication number 20240249776
- Publication date Jul 25, 2024
- Micron Technology, Inc.
- Vinh Quang Diep
- G11 - INFORMATION STORAGE
Information Patent Application
ENHANCED GRADIENT SEEDING SCHEME DURING A PROGRAM OPERATION IN A ME...
- Publication number 20240120010
- Publication date Apr 11, 2024
- Micron Technology, Inc.
- Vinh Q. Diep
- G11 - INFORMATION STORAGE
Information Patent Application
ERASE PULSE LOOP DEPENDENT ADJUSTMENT OF SELECT GATE ERASE BIAS VOL...
- Publication number 20240071515
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Ching-Huang Lu
- G11 - INFORMATION STORAGE
Information Patent Application
ADAPTIVE SENSING TIME FOR MEMORY OPERATIONS
- Publication number 20240055052
- Publication date Feb 15, 2024
- Micron Technology, Inc.
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Application
SELECTIVE INCREASE AND DECREASE TO PASS VOLTAGES FOR PROGRAMMING A...
- Publication number 20230268003
- Publication date Aug 24, 2023
- Micron Technology, Inc.
- Vinh Quang Diep
- G11 - INFORMATION STORAGE
Information Patent Application
BIAS VOLTAGE SCHEMES DURING PRE-PROGRAMMING AND PROGRAMMING PHASES
- Publication number 20230197164
- Publication date Jun 22, 2023
- Micron Technology, Inc.
- Vinh Q. Diep
- G11 - INFORMATION STORAGE
Information Patent Application
DETRAPPING ELECTRONS TO PREVENT QUICK CHARGE LOSS DURING PROGRAM VE...
- Publication number 20230044240
- Publication date Feb 9, 2023
- Micron Technology, Inc.
- Ching-Huang Lu
- G11 - INFORMATION STORAGE
Information Patent Application
DETRAPPING ELECTRONS TO PREVENT QUICK CHARGE LOSS DURING PROGRAM VE...
- Publication number 20220199175
- Publication date Jun 23, 2022
- Micron Technology, Inc.
- Ching-Huang Lu
- G11 - INFORMATION STORAGE
Information Patent Application
ENHANCED GRADIENT SEEDING SCHEME DURING A PROGRAM OPERATION IN A ME...
- Publication number 20220189555
- Publication date Jun 16, 2022
- Micron Technology, Inc.
- Vinh Q. Diep
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH COMPENSATION FOR PROGRAM SPEED VARIATIONS DUE TO...
- Publication number 20210082515
- Publication date Mar 18, 2021
- SANDISK TECHNOLOGIES LLC
- Ching-Huang Lu
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH COMPENSATION FOR ERASE SPEED VARIATIONS DUE TO B...
- Publication number 20200335168
- Publication date Oct 22, 2020
- SANDISK TECHNOLOGIES LLC
- Ching-Huang Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-STATE PROGRAMMING IN MEMORY DEVICE WITH LOOP-DEPENDENT BIT LI...
- Publication number 20200312410
- Publication date Oct 1, 2020
- SANDISK TECHNOLOGIES LLC
- Ching-Huang Lu
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-PASS PROGRAMMING PROCESS FOR MEMORY DEVICE WHICH OMITS VERIFY...
- Publication number 20200312414
- Publication date Oct 1, 2020
- SANDISK TECHNOLOGIES LLC
- Ashish Baraskar
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH COMPENSATION FOR ERASE SPEED VARIATIONS DUE TO B...
- Publication number 20200265897
- Publication date Aug 20, 2020
- SANDISK TECHNOLOGIES LLC
- Ching-Huang Lu
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH COMPENSATION FOR PROGRAM SPEED VARIATIONS DUE TO...
- Publication number 20200243141
- Publication date Jul 30, 2020
- SANDISK TECHNOLOGIES LLC
- Ching-Huang Lu
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-PASS PROGRAMMING PROCESS FOR MEMORY DEVICE WHICH OMITS VERIFY...
- Publication number 20200211663
- Publication date Jul 2, 2020
- SANDISK TECHNOLOGIES LLC
- Ashish Baraskar
- G11 - INFORMATION STORAGE
Information Patent Application
THREE DIMENSIONAL NAND MEMORY DEVICE WITH DRAIN SELECT GATE ELECTRO...
- Publication number 20190333581
- Publication date Oct 31, 2019
- SANDISK TECHNOLOGIES LLC
- Vinh DIEP
- G11 - INFORMATION STORAGE
Information Patent Application
ADJUSTING VOLTAGE ON ADJACENT WORD LINE DURING VERIFY OF MEMORY CEL...
- Publication number 20190311772
- Publication date Oct 10, 2019
- SanDisk Technologies LLC
- Vinh Diep
- G11 - INFORMATION STORAGE
Information Patent Application
PREVENTING REFRESH OF VOLTAGES OF DUMMY MEMORY CELLS TO REDUCE THRE...
- Publication number 20190259462
- Publication date Aug 22, 2019
- SanDisk Technologies LLC
- Ching-Huang Lu
- G11 - INFORMATION STORAGE
Information Patent Application
WORD LINE-DEPENDENT AND TEMPERATURE-DEPENDENT ERASE DEPTH
- Publication number 20170345470
- Publication date Nov 30, 2017
- SanDisk Technologies LLC
- Liang Pang
- G11 - INFORMATION STORAGE
Information Patent Application
DUMMY WORD LINE CONTROL SCHEME FOR NON-VOLATILE MEMORY
- Publication number 20170330631
- Publication date Nov 16, 2017
- SANDISK TECHNOLOGIES INC.
- Vinh Quang Diep
- G11 - INFORMATION STORAGE

Vinh Quang Diep

Person

Patents Grantslast 30 patents

Adaptive sensing time for memory operations

Bias voltage schemes during pre-programming and programming phases

Detrapping electrons to prevent quick charge loss during program ve...

Enhanced gradient seeding scheme during a program operation in a me...

Detrapping electrons to prevent quick charge loss during program ve...

Multi-pass programming process for memory device which omits verify...

Memory device with compensation for program speed variations due to...

Memory device with compensation for erase speed variations due to b...

Memory device with compensation for program speed variations due to...

Multi-state programming in memory device with loop-dependent bit li...

Multi-pass programming process for memory device which omits verify...

Memory device with compensation for erase speed variations due to b...

Multi-state programming in memory device with loop-dependent bit li...

Memory device with compensation for program speed variations due to...

Memory device with reduced neighbor word line interference using ad...

Three dimensional NAND memory device with drain select gate electro...

Multi-pass programming with modified pass voltages to tighten thres...

Preventing refresh of voltages of dummy memory cells to reduce thre...

Adjusting voltage on adjacent word line during verify of memory cel...

Early ramp down of dummy word line voltage during read to suppress...

Channel pre-charge to suppress disturb of select gate transistors d...

Programming of dummy memory cell to reduce charge loss in select ga...

Reducing select gate injection disturb at the beginning of an erase...

Dummy word line control scheme for non-volatile memory

Word line-dependent and temperature-dependent erase depth

Patents Applicationslast 30 patents

DRAIN-SIDE WORDLINE VOLTAGE BOOSTING TO REDUCE LATERAL ELECTRON FIE...

ENHANCED GRADIENT SEEDING SCHEME DURING A PROGRAM OPERATION IN A ME...

ERASE PULSE LOOP DEPENDENT ADJUSTMENT OF SELECT GATE ERASE BIAS VOL...

ADAPTIVE SENSING TIME FOR MEMORY OPERATIONS

SELECTIVE INCREASE AND DECREASE TO PASS VOLTAGES FOR PROGRAMMING A...

BIAS VOLTAGE SCHEMES DURING PRE-PROGRAMMING AND PROGRAMMING PHASES

DETRAPPING ELECTRONS TO PREVENT QUICK CHARGE LOSS DURING PROGRAM VE...

DETRAPPING ELECTRONS TO PREVENT QUICK CHARGE LOSS DURING PROGRAM VE...

ENHANCED GRADIENT SEEDING SCHEME DURING A PROGRAM OPERATION IN A ME...

MEMORY DEVICE WITH COMPENSATION FOR PROGRAM SPEED VARIATIONS DUE TO...

MEMORY DEVICE WITH COMPENSATION FOR ERASE SPEED VARIATIONS DUE TO B...

MULTI-STATE PROGRAMMING IN MEMORY DEVICE WITH LOOP-DEPENDENT BIT LI...

MULTI-PASS PROGRAMMING PROCESS FOR MEMORY DEVICE WHICH OMITS VERIFY...

MEMORY DEVICE WITH COMPENSATION FOR ERASE SPEED VARIATIONS DUE TO B...

MEMORY DEVICE WITH COMPENSATION FOR PROGRAM SPEED VARIATIONS DUE TO...

MULTI-PASS PROGRAMMING PROCESS FOR MEMORY DEVICE WHICH OMITS VERIFY...

THREE DIMENSIONAL NAND MEMORY DEVICE WITH DRAIN SELECT GATE ELECTRO...

ADJUSTING VOLTAGE ON ADJACENT WORD LINE DURING VERIFY OF MEMORY CEL...

PREVENTING REFRESH OF VOLTAGES OF DUMMY MEMORY CELLS TO REDUCE THRE...

WORD LINE-DEPENDENT AND TEMPERATURE-DEPENDENT ERASE DEPTH

DUMMY WORD LINE CONTROL SCHEME FOR NON-VOLATILE MEMORY