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Virinder Singh
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Fremont, CA, US
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last 30 patents
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Patent Grant
I/O device layout during integrated circuit design
Patent number
6,457,157
Issue date
Sep 24, 2002
LSI Logic Corporation
Virinder Singh
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Method and apparatus for netlist filtering and cell placement
Patent number
6,243,849
Issue date
Jun 5, 2001
LSI Logic Corporation
Virinder Singh
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Method for I/O device layout during integrated circuit design
Patent number
6,057,169
Issue date
May 2, 2000
LSI Logic Corporation
Virinder Singh
G06 - COMPUTING CALCULATING COUNTING