Vishal Khandelwal

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Machine learning-enabled estimation of path-based timing analysis b...
- Patent number 12,124,782
- Issue date Oct 22, 2024
- Synopsys, Inc.
- Siddhartha Nath
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Machine learning-based prediction of metrics at early-stage circuit...
- Patent number 11,836,641
- Issue date Dec 5, 2023
- Synopsys, Inc.
- Ravi Mamidi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reinforcement learning-based adjustment of digital circuits
- Patent number 11,741,282
- Issue date Aug 29, 2023
- Synopsys, Inc.
- Siddhartha Nath
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Machine learning-based algorithm to accurately predict detail-route...
- Patent number 11,636,388
- Issue date Apr 25, 2023
- Synopsys, Inc.
- Wei-Ting Chan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Machine-learning driven prediction in integrated circuit design
- Patent number 11,256,845
- Issue date Feb 22, 2022
- Synopsys, Inc.
- Siddhartha Nath
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Concurrent optimization of timing, area, and leakage power
- Patent number 9,245,075
- Issue date Jan 26, 2016
- Synopsys, Inc.
- Yiu-Chung Mang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Look-up based fast logic synthesis
- Patent number 8,924,901
- Issue date Dec 30, 2014
- Synopsys, Inc.
- Yiu-Chung Mang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interconnect-driven physical synthesis using persistent virtual rou...
- Patent number 7,853,915
- Issue date Dec 14, 2010
- Synopsys, Inc.
- Prashant Saxena
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
REINFORCEMENT LEARNING-BASED ADJUSTMENT OF DIGITAL CIRCUITS
- Publication number 20220229960
- Publication date Jul 21, 2022
- Synopsys, Inc.
- Siddhartha NATH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MACHINE LEARNING-BASED PREDICTION OF METRICS AT EARLY-STAGE CIRCUIT...
- Publication number 20210287120
- Publication date Sep 16, 2021
- Synopsys, Inc.
- Ravi MAMIDI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MACHINE-LEARNING DRIVEN PREDICTION IN INTEGRATED CIRCUIT DESIGN
- Publication number 20210073456
- Publication date Mar 11, 2021
- Synopsys, Inc.
- Siddhartha Nath
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONCURRENT OPTIMIZATION OF TIMING, AREA, AND LEAKAGE POWER
- Publication number 20150089462
- Publication date Mar 26, 2015
- Synopsys, Inc.
- Yiu-Chung Mang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOOK-UP BASED FAST LOGIC SYNTHESIS
- Publication number 20140237437
- Publication date Aug 21, 2014
- Synopsys, Inc.
- Yiu-Chung Mang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Interconnect-Driven Physical Synthesis Using Persistent Virtual Rou...
- Publication number 20090319977
- Publication date Dec 24, 2009
- Synopsys, Inc.
- Prashant Saxena
- G06 - COMPUTING CALCULATING COUNTING

Vishal Khandelwal

Person

Patents Grantslast 30 patents

Machine learning-enabled estimation of path-based timing analysis b...

Machine learning-based prediction of metrics at early-stage circuit...

Reinforcement learning-based adjustment of digital circuits

Machine learning-based algorithm to accurately predict detail-route...

Machine-learning driven prediction in integrated circuit design

Concurrent optimization of timing, area, and leakage power

Look-up based fast logic synthesis

Interconnect-driven physical synthesis using persistent virtual rou...

Patents Applicationslast 30 patents

REINFORCEMENT LEARNING-BASED ADJUSTMENT OF DIGITAL CIRCUITS

MACHINE LEARNING-BASED PREDICTION OF METRICS AT EARLY-STAGE CIRCUIT...

MACHINE-LEARNING DRIVEN PREDICTION IN INTEGRATED CIRCUIT DESIGN

CONCURRENT OPTIMIZATION OF TIMING, AREA, AND LEAKAGE POWER

LOOK-UP BASED FAST LOGIC SYNTHESIS

Interconnect-Driven Physical Synthesis Using Persistent Virtual Rou...