Vishram Sarurkar

Person

Folsom, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Controlling power delivery to a processor via a bypass
- Patent number 11,687,135
- Issue date Jun 27, 2023
- Tahoe Research, LTD.
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controlling power delivery to a processor via a bypass
- Patent number 11,157,052
- Issue date Oct 26, 2021
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controlling power delivery to a processor via a bypass
- Patent number 10,429,913
- Issue date Oct 1, 2019
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controlling power delivery to a processor via a bypass
- Patent number 10,409,346
- Issue date Sep 10, 2019
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controlling power delivery to a processor via a bypass
- Patent number 10,146,283
- Issue date Dec 4, 2018
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controlling power delivery to a processor via a bypass
- Patent number 9,823,719
- Issue date Nov 21, 2017
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for controlled reset sequences without paralle...
- Patent number 9,223,365
- Issue date Dec 29, 2015
- Intel Corporation
- Ivan Herrera Mejia
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Controlling Power Delivery To A Processor Via A Bypass
- Publication number 20220004237
- Publication date Jan 6, 2022
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Controlling Power Delivery To A Processor Via A Bypass
- Publication number 20200019221
- Publication date Jan 16, 2020
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Controlling Power Delivery To A Processor Via A Bypass
- Publication number 20180341305
- Publication date Nov 29, 2018
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Controlling Power Delivery To A Processor Via A Bypass
- Publication number 20180341306
- Publication date Nov 29, 2018
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Controlling Power Delivery To A Processor Via A Bypass
- Publication number 20180059751
- Publication date Mar 1, 2018
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Controlling Power Delivery To A Processor Via A Bypass
- Publication number 20140359311
- Publication date Dec 4, 2014
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR CONTROLLED RESET SEQUENCES WITHOUT PARALLE...
- Publication number 20140281641
- Publication date Sep 18, 2014
- Intel Corporation
- Ivan Herrera Mejia
- G06 - COMPUTING CALCULATING COUNTING

Vishram Sarurkar

Person

Patents Grantslast 30 patents

Controlling power delivery to a processor via a bypass

Controlling power delivery to a processor via a bypass

Controlling power delivery to a processor via a bypass

Controlling power delivery to a processor via a bypass

Controlling power delivery to a processor via a bypass

Controlling power delivery to a processor via a bypass

Method and apparatus for controlled reset sequences without paralle...

Patents Applicationslast 30 patents

Controlling Power Delivery To A Processor Via A Bypass

Controlling Power Delivery To A Processor Via A Bypass

Controlling Power Delivery To A Processor Via A Bypass

Controlling Power Delivery To A Processor Via A Bypass

Controlling Power Delivery To A Processor Via A Bypass

Controlling Power Delivery To A Processor Via A Bypass

METHOD AND APPARATUS FOR CONTROLLED RESET SEQUENCES WITHOUT PARALLE...