Visvesh Sathe

Person

Fort Collins, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Constraining clock skew in a resonant clocked system
- Patent number 8,975,936
- Issue date Mar 10, 2015
- Advanced Micro Devices, Inc.
- Visvesh S. Sathe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transitioning between resonant clocking mode and conventional clock...
- Patent number 8,941,432
- Issue date Jan 27, 2015
- Advanced Micro Devices, Inc.
- Visvesh S. Sathe
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock driver for frequency-scalable systems
- Patent number 8,854,100
- Issue date Oct 7, 2014
- Advanced Micro Devices, Inc.
- Visvesh S. Sathe
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable clock driver
- Patent number 8,836,403
- Issue date Sep 16, 2014
- Advanced Micro Devices, Inc.
- Visvesh S. Sathe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controlling impedance of a switch using high impedance voltage sour...
- Patent number 8,742,817
- Issue date Jun 3, 2014
- Advanced Micro Devices, Inc.
- Visvesh S. Sathe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sense-amplifier monotizer
- Patent number 8,710,868
- Issue date Apr 29, 2014
- Advanced Micro Devices, Inc.
- Samuel D. Naffziger
- G11 - INFORMATION STORAGE
Information Patent Grant
Oscillator device and methods thereof
- Patent number 8,373,512
- Issue date Feb 12, 2013
- Advanced Micro Devices, Inc.
- Visvesh S. Sathe
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock distribution network architecture with clock skew management
- Patent number 8,289,063
- Issue date Oct 16, 2012
- The Regents of the University of Michigan
- Juang-Ying Chueh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Interposer including voltage regulator and method therefor
- Patent number 8,193,799
- Issue date Jun 5, 2012
- GlobalFoundries Inc.
- Stephen V. Kosonocky
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Clock distribution network architecture with clock skew management
- Patent number 7,956,664
- Issue date Jun 7, 2011
- The Regents of the University of Michigan
- Juang-Ying Chueh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Clock distribution network architecture for resonant-clocked systems
- Patent number 7,719,316
- Issue date May 18, 2010
- The Regents of the University of Michigan
- Juang-Ying Chueh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock distribution network architecture with resonant clock gating
- Patent number 7,719,317
- Issue date May 18, 2010
- The Regents of the University of Michigan
- Juang-Ying Chueh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Energy recovery boost logic
- Patent number 7,355,454
- Issue date Apr 8, 2008
- The Regents of the University of Michigan
- Marios C. Papaefthymiou
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER

Patents Applicationslast 30 patents

Information Patent Application
CONSTRAINING CLOCK SKEW IN A RESONANT CLOCKED SYSTEM
- Publication number 20140062562
- Publication date Mar 6, 2014
- Visvesh S. Sathe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROLLING IMPEDANCE OF A SWITCH USING HIGH IMPEDANCE VOLTAGE SOUR...
- Publication number 20140062563
- Publication date Mar 6, 2014
- Visvesh S. Sathe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE CLOCK DRIVER
- Publication number 20140062564
- Publication date Mar 6, 2014
- Visvesh S. Sathe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSITIONING BETWEEN RESONANT CLOCKING MODE AND CONVENTIONAL CLOCK...
- Publication number 20140062566
- Publication date Mar 6, 2014
- Advanced Micro Devices, Inc.
- Visvesh S. Sathe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCK DRIVER FOR FREQUENCY-SCALABLE SYSTEMS
- Publication number 20140062565
- Publication date Mar 6, 2014
- Visvesh S. Sathe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCK STRETCHER FOR VOLTAGE DROOP MITIGATION
- Publication number 20120187991
- Publication date Jul 26, 2012
- Advanced Micro Devices, Inc.
- Visvesh SATHE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OSCILLATOR DEVICE AND METHODS THEREOF
- Publication number 20120161884
- Publication date Jun 28, 2012
- Advanced Micro Devices, Inc.
- Visvesh S. Sathe
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SENSE-AMPLIFIER MONOTIZER
- Publication number 20120154188
- Publication date Jun 21, 2012
- Advanced Micro Devices, Inc.
- Samuel D. Naffziger
- G11 - INFORMATION STORAGE
Information Patent Application
Clock Distribution Network Architecture with Clock Skew Management
- Publication number 20110215854
- Publication date Sep 8, 2011
- The Regents of the University of Michigan
- Juang-Ying Chueh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERPOSER INCLUDING VOLTAGE REGULATOR AND METHOD THEREFOR
- Publication number 20100072961
- Publication date Mar 25, 2010
- Advanced Micro Devices, Inc.
- Stephen V. Kosonocky
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Clock Distribution Network Architecture for Resonant-Clocked Systems
- Publication number 20080303552
- Publication date Dec 11, 2008
- The Regents of the University of Michigan
- Juang-Ying Chueh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Clock Distribution Network Architecture with Resonant Clock Gating
- Publication number 20080303576
- Publication date Dec 11, 2008
- The Regents of the University of Michigan
- Juang-Ying Chueh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Clock Distribution Network Architecture with Clock Skew Management
- Publication number 20080150605
- Publication date Jun 26, 2008
- The Regents of the University of Michigan
- Juang-Ying Chueh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Energy recovery boost logic
- Publication number 20060082387
- Publication date Apr 20, 2006
- Marios C. Papaefthymiou
- H03 - BASIC ELECTRONIC CIRCUITRY

Visvesh Sathe

Person

Patents Grantslast 30 patents

Constraining clock skew in a resonant clocked system

Transitioning between resonant clocking mode and conventional clock...

Clock driver for frequency-scalable systems

Programmable clock driver

Controlling impedance of a switch using high impedance voltage sour...

Sense-amplifier monotizer

Oscillator device and methods thereof

Clock distribution network architecture with clock skew management

Interposer including voltage regulator and method therefor

Clock distribution network architecture with clock skew management

Clock distribution network architecture for resonant-clocked systems

Clock distribution network architecture with resonant clock gating

Energy recovery boost logic

Patents Applicationslast 30 patents

CONSTRAINING CLOCK SKEW IN A RESONANT CLOCKED SYSTEM

CONTROLLING IMPEDANCE OF A SWITCH USING HIGH IMPEDANCE VOLTAGE SOUR...

PROGRAMMABLE CLOCK DRIVER

TRANSITIONING BETWEEN RESONANT CLOCKING MODE AND CONVENTIONAL CLOCK...

CLOCK DRIVER FOR FREQUENCY-SCALABLE SYSTEMS

CLOCK STRETCHER FOR VOLTAGE DROOP MITIGATION

OSCILLATOR DEVICE AND METHODS THEREOF

SENSE-AMPLIFIER MONOTIZER

Clock Distribution Network Architecture with Clock Skew Management

INTERPOSER INCLUDING VOLTAGE REGULATOR AND METHOD THEREFOR

Clock Distribution Network Architecture for Resonant-Clocked Systems

Clock Distribution Network Architecture with Resonant Clock Gating

Clock Distribution Network Architecture with Clock Skew Management

Energy recovery boost logic