VISWANATH MOHAN

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Austin, TX, US

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Patents Grantslast 30 patents

Information Patent Grant
System and method of distinguishing system management mode entries...
- Patent number 10,078,597
- Issue date Sep 18, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Viswanath Mohan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address translation cache that supports simultaneous invalidation o...
- Patent number 9,842,055
- Issue date Dec 12, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Colin Eddy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient address translation caching in a processor that supports...
- Patent number 9,727,480
- Issue date Aug 8, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Terry Parks
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SYSTEM AND METHOD OF DISTINGUISHING SYSTEM MANAGEMENT MODE ENTRIES...
- Publication number 20160292075
- Publication date Oct 6, 2016
- VIA Alliance Semiconductor Co., Ltd.
- VISWANATH MOHAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADDRESS TRANSLATION CACHE THAT SUPPORTS SIMULTANEOUS INVALIDATION O...
- Publication number 20160179701
- Publication date Jun 23, 2016
- VIA Alliance Semiconductor Co., Ltd.
- COLIN EDDY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT ADDRESS TRANSLATION CACHING IN A PROCESSOR THAT SUPPORTS...
- Publication number 20160041922
- Publication date Feb 11, 2016
- TERRY PARKS
- G06 - COMPUTING CALCULATING COUNTING