Vito Dai

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Optimization of physical cell placement for integrated circuits
- Patent number 11,714,944
- Issue date Aug 1, 2023
- Motivo, Inc.
- Vito Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
And optimization of physical cell placement
- Patent number 10,936,778
- Issue date Mar 2, 2021
- Motivo, Inc.
- Vito Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit design systems and methods
- Patent number 10,339,254
- Issue date Jul 2, 2019
- Motivo, Inc.
- Vito Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit design systems and methods
- Patent number 9,959,380
- Issue date May 1, 2018
- Motivo, Inc.
- Vito Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for fabricating integrated circuits including generating ph...
- Patent number 9,170,501
- Issue date Oct 27, 2015
- GLOBALFOUNDRIES, INC.
- Azat Latypov
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Design-for-manufacturing—design-enabled-manufacturing (DFM-DEM) pro...
- Patent number 9,081,919
- Issue date Jul 14, 2015
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Vito Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for fabricating integrated circuits including generating e-...
- Patent number 9,023,730
- Issue date May 5, 2015
- GLOBALFOUNDRIES, INC.
- Azat Latypov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Metal layer enabling directed self-assembly semiconductor layout de...
- Patent number 9,012,270
- Issue date Apr 21, 2015
- GLOBALFOUNDRIES Inc.
- Ji Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for fabricating integrated circuits including generating ph...
- Patent number 9,009,634
- Issue date Apr 14, 2015
- GLOBALFOUNDRIES, INC.
- Azat Latypov
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Automated design layout pattern correction based on context-aware p...
- Patent number 8,924,896
- Issue date Dec 30, 2014
- GLOBALFOUNDRIES Inc.
- Lynn Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods involving pattern matching to identify and resolve potentia...
- Patent number 8,910,090
- Issue date Dec 9, 2014
- GLOBALFOUNDRIES Inc.
- Lynn T. Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Layout pattern correction for integrated circuits
- Patent number 8,898,606
- Issue date Nov 25, 2014
- GLOBALFOUNDRIES Inc.
- Rani Abou Ghaida
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for decomposing circuit design layouts and for fabricating...
- Patent number 8,555,215
- Issue date Oct 8, 2013
- GLOBALFOUNDRIES, INC.
- Yi Zou
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method and apparatus for pattern adjusted timing via pattern matching
- Patent number 8,453,089
- Issue date May 28, 2013
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Kah Ching Edward Teoh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for pattern matching in a double patterning technology-comp...
- Patent number 8,418,105
- Issue date Apr 9, 2013
- GLOBALFOUNDRIES, INC.
- Lynn T. Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Design rules checking augmented with pattern matching
- Patent number 7,757,190
- Issue date Jul 13, 2010
- Advanced Micro Devices, Inc.
- Vito Dai
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DESIGN AND OPTIMIZATION OF PHYSICAL CELL PLACEMENT FOR INTEGRATED C...
- Publication number 20210124865
- Publication date Apr 29, 2021
- Motivo, Inc.
- Vito Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DESIGN AND OPTIMIZATION OF PHYSICAL CELL PLACEMENT
- Publication number 20190080036
- Publication date Mar 14, 2019
- Motivo, Inc.
- Vito Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT DESIGN SYSTEMS AND METHODS
- Publication number 20180247006
- Publication date Aug 30, 2018
- Motivo, Inc.
- Vito Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT DESIGN SYSTEMS AND METHODS
- Publication number 20170277818
- Publication date Sep 28, 2017
- Motivo, Inc.
- Vito Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PATTERN MATCHING FOR PREDICTING DEFECT LIMITED YIELD
- Publication number 20150286763
- Publication date Oct 8, 2015
- GLOBALFOUNDRIES INC.
- Lynn WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING GENERATING E-...
- Publication number 20150126032
- Publication date May 7, 2015
- GLOBAL FOUNDRIES, INC.
- Azat Latypov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING GENERATING PH...
- Publication number 20150012897
- Publication date Jan 8, 2015
- GLOBALFOUNDERIES, Inc.
- Azat Latypov
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING GENERATING PH...
- Publication number 20150012896
- Publication date Jan 8, 2015
- GLOBALFOUNDRIES, Inc.
- Azat Latypov
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
DESIGN-FOR-MANUFACTURING - DESIGN-ENABLED-MANUFACTURING (DFM-DEM) P...
- Publication number 20140282288
- Publication date Sep 18, 2014
- Vito DAI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METAL LAYER ENABLING DIRECTED SELF-ASSEMBLY SEMICONDUCTOR LAYOUT DE...
- Publication number 20140264461
- Publication date Sep 18, 2014
- GLOBALFOUNDRIES INC.
- Ji XU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS INVOLVING PATTERN MATCHING TO IDENTIFY AND RESOLVE POTENTIA...
- Publication number 20140245238
- Publication date Aug 28, 2014
- GLOBALFOUNDRIES INC.
- Lynn T. Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTOMATED DESIGN LAYOUT PATTERN CORRECTION BASED ON CONTEXT-AWARE P...
- Publication number 20140215415
- Publication date Jul 31, 2014
- GLOBALFOUNDRIES INC.
- Lynn WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS FOR DECOMPOSING CIRCUIT DESIGN LAYOUTS AND FOR FABRICATING...
- Publication number 20130219347
- Publication date Aug 22, 2013
- GLOBALFOUNDRIES INC.
- Yi Zou
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
METHOD AND APPARATUS FOR PATTERN ADJUSTED TIMING VIA PATTERN MATCHING
- Publication number 20130086542
- Publication date Apr 4, 2013
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Kah Ching Edward Teoh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Design Rules Checking Augmented With Pattern Matching
- Publication number 20080148211
- Publication date Jun 19, 2008
- Advanced Micro Devices, Inc.
- Vito Dai
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Optimization of physical cell placement for integrated circuits

And optimization of physical cell placement

Integrated circuit design systems and methods

Integrated circuit design systems and methods

Methods for fabricating integrated circuits including generating ph...

Design-for-manufacturing—design-enabled-manufacturing (DFM-DEM) pro...

Methods for fabricating integrated circuits including generating e-...

Metal layer enabling directed self-assembly semiconductor layout de...

Methods for fabricating integrated circuits including generating ph...

Automated design layout pattern correction based on context-aware p...

Methods involving pattern matching to identify and resolve potentia...

Layout pattern correction for integrated circuits

Methods for decomposing circuit design layouts and for fabricating...

Method and apparatus for pattern adjusted timing via pattern matching

Methods for pattern matching in a double patterning technology-comp...

Design rules checking augmented with pattern matching

Patents Applicationslast 30 patents

DESIGN AND OPTIMIZATION OF PHYSICAL CELL PLACEMENT FOR INTEGRATED C...

DESIGN AND OPTIMIZATION OF PHYSICAL CELL PLACEMENT

INTEGRATED CIRCUIT DESIGN SYSTEMS AND METHODS

INTEGRATED CIRCUIT DESIGN SYSTEMS AND METHODS

PATTERN MATCHING FOR PREDICTING DEFECT LIMITED YIELD

METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING GENERATING E-...

METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING GENERATING PH...

METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING GENERATING PH...

DESIGN-FOR-MANUFACTURING - DESIGN-ENABLED-MANUFACTURING (DFM-DEM) P...

METAL LAYER ENABLING DIRECTED SELF-ASSEMBLY SEMICONDUCTOR LAYOUT DE...

METHODS INVOLVING PATTERN MATCHING TO IDENTIFY AND RESOLVE POTENTIA...

AUTOMATED DESIGN LAYOUT PATTERN CORRECTION BASED ON CONTEXT-AWARE P...

METHODS FOR DECOMPOSING CIRCUIT DESIGN LAYOUTS AND FOR FABRICATING...

METHOD AND APPARATUS FOR PATTERN ADJUSTED TIMING VIA PATTERN MATCHING

Design Rules Checking Augmented With Pattern Matching