Vivek Kozhikkottu

Person

Hillsboro, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Two-level main memory hierarchy management
- Patent number 12,271,305
- Issue date Apr 8, 2025
- Intel Corporation
- Sai Prashanth Muralidhara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable data bus inversion and configurable implementation
- Patent number 11,281,616
- Issue date Mar 22, 2022
- Intel Corporation
- Melin Dadual
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for setting a 2-level auto-close timer to access a memor...
- Patent number 11,216,386
- Issue date Jan 4, 2022
- Intel Corporation
- Vivek Kozhikkottu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device with local cache array
- Patent number 11,144,466
- Issue date Oct 12, 2021
- Intel Corporation
- Jongwon Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for application specific address mapping
- Patent number 10,936,507
- Issue date Mar 2, 2021
- Intel Corporation
- Vivek Kozhikkottu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast search of error correction code (ECC) protected data in a memory
- Patent number 10,884,853
- Issue date Jan 5, 2021
- Intel Corporation
- Wei Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Minimal aliasing bit-error correction code
- Patent number 10,860,419
- Issue date Dec 8, 2020
- Intel Corporation
- Dinesh Somasekhar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction code (ECC) and data bus inversion (DBI) encoding
- Patent number 10,862,622
- Issue date Dec 8, 2020
- Intel Corporation
- Vivek Joy Kozhikkottu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low latency statistical data bus inversion for energy reduction
- Patent number 10,853,300
- Issue date Dec 1, 2020
- Intel Corporation
- Vivek Kozhikkottu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low-overhead mechanism to detect address faults in ECC-protected me...
- Patent number 10,319,461
- Issue date Jun 11, 2019
- Intel Corporation
- Kon-Woo Kwon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller that forces prefetches in response to a present r...
- Patent number 10,268,585
- Issue date Apr 23, 2019
- Intel Corporation
- Ashish Ranjan
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MEMORY SIDE PREFETCH ARCHITECTURE FOR IMPROVED MEMORY BANDWIDTH
- Publication number 20230091205
- Publication date Mar 23, 2023
- Intel Corporation
- Adrian Moga
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TWO-LEVEL MAIN MEMORY HIERARCHY MANAGEMENT
- Publication number 20210216452
- Publication date Jul 15, 2021
- Intel Corporation
- Sai Prashanth MURALIDHARA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, Apparatus And Method For Application Specific Address Mapping
- Publication number 20200310979
- Publication date Oct 1, 2020
- Intel Corporation
- Vivek Kozhikkottu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE DATA BUS INVERSION AND CONFIGURABLE IMPLEMENTATION
- Publication number 20200285599
- Publication date Sep 10, 2020
- Intel Corporation
- Melin Dadual
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MINIMAL ALIASING BIT-ERROR CORRECTION CODE
- Publication number 20200210284
- Publication date Jul 2, 2020
- Intel Corporation
- Dinesh Somasekhar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR SETTING A 2-LEVEL AUTO-CLOSE TIMER TO ACCESS A MEMOR...
- Publication number 20200019513
- Publication date Jan 16, 2020
- Intel Corporation
- Vivek KOZHIKKOTTU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADDRESS RANGE BASED IN-BAND MEMORY ERROR-CORRECTING CODE PROTECTION...
- Publication number 20190332469
- Publication date Oct 31, 2019
- Intel Corporation
- Amir A. RADJAI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE WITH LOCAL CACHE ARRAY
- Publication number 20190286566
- Publication date Sep 19, 2019
- Intel Corporation
- Jongwon Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR CORRECTION CODE (ECC) AND DATA BUS INVERSION (DBI) ENCODING
- Publication number 20190280813
- Publication date Sep 12, 2019
- Intel Corporation
- Vivek Joy Kozhikkottu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
FAST SEARCH OF ERROR CORRECTION CODE (ECC) PROTECTED DATA IN A MEMORY
- Publication number 20190146873
- Publication date May 16, 2019
- Intel Corporation
- Wei Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTIMIZED MEMORY ACCESS BANDWIDTH DEVICES, SYSTEMS, AND METHODS FOR...
- Publication number 20180285252
- Publication date Oct 4, 2018
- Intel Corporation
- Kon-Woo Kwon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW LATENCY STATISTICAL DATA BUS INVERSION FOR ENERGY REDUCTION
- Publication number 20180285304
- Publication date Oct 4, 2018
- Intel Corporation
- Vivek Kozhikkottu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INCREASING READ PENDING QUEUE CAPACITY TO INCREASE MEMORY BANDWIDTH
- Publication number 20180188976
- Publication date Jul 5, 2018
- Intel Corporation
- Gunjae Koo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Low-Overhead Mechanism to Detect Address Faults in ECC-Protected Me...
- Publication number 20180004597
- Publication date Jan 4, 2018
- Intel Corporation
- Kon-Woo KWON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTROLLER THAT FORCES PREFETCHES IN RESPONSE TO A PRESENT R...
- Publication number 20170371791
- Publication date Dec 28, 2017
- Intel Corporation
- Ashish RANJAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENERGY EFFICIENT READ/WRITE SUPPORT FOR A PROTECTED MEMORY
- Publication number 20170286216
- Publication date Oct 5, 2017
- Intel Corporation
- Vivek Kozhikkottu
- G06 - COMPUTING CALCULATING COUNTING

Vivek Kozhikkottu

Person

Patents Grantslast 30 patents

Two-level main memory hierarchy management

Programmable data bus inversion and configurable implementation

Techniques for setting a 2-level auto-close timer to access a memor...

Memory device with local cache array

System, apparatus and method for application specific address mapping

Fast search of error correction code (ECC) protected data in a memory

Minimal aliasing bit-error correction code

Error correction code (ECC) and data bus inversion (DBI) encoding

Low latency statistical data bus inversion for energy reduction

Low-overhead mechanism to detect address faults in ECC-protected me...

Memory controller that forces prefetches in response to a present r...

Patents Applicationslast 30 patents

MEMORY SIDE PREFETCH ARCHITECTURE FOR IMPROVED MEMORY BANDWIDTH

TWO-LEVEL MAIN MEMORY HIERARCHY MANAGEMENT

System, Apparatus And Method For Application Specific Address Mapping

PROGRAMMABLE DATA BUS INVERSION AND CONFIGURABLE IMPLEMENTATION

MINIMAL ALIASING BIT-ERROR CORRECTION CODE

TECHNIQUES FOR SETTING A 2-LEVEL AUTO-CLOSE TIMER TO ACCESS A MEMOR...

ADDRESS RANGE BASED IN-BAND MEMORY ERROR-CORRECTING CODE PROTECTION...

MEMORY DEVICE WITH LOCAL CACHE ARRAY

ERROR CORRECTION CODE (ECC) AND DATA BUS INVERSION (DBI) ENCODING

FAST SEARCH OF ERROR CORRECTION CODE (ECC) PROTECTED DATA IN A MEMORY

OPTIMIZED MEMORY ACCESS BANDWIDTH DEVICES, SYSTEMS, AND METHODS FOR...

LOW LATENCY STATISTICAL DATA BUS INVERSION FOR ENERGY REDUCTION

INCREASING READ PENDING QUEUE CAPACITY TO INCREASE MEMORY BANDWIDTH

Low-Overhead Mechanism to Detect Address Faults in ECC-Protected Me...

MEMORY CONTROLLER THAT FORCES PREFETCHES IN RESPONSE TO A PRESENT R...

ENERGY EFFICIENT READ/WRITE SUPPORT FOR A PROTECTED MEMORY