Vivek Nautiyal

Person

Milpitas, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Column redundancy techniques
- Patent number 11,664,086
- Issue date May 30, 2023
- ARM Limited
- Yew Keong Chong
- G11 - INFORMATION STORAGE
Information Patent Grant
Dummy bitline circuitry
- Patent number 11,232,833
- Issue date Jan 25, 2022
- ARM Limited
- Abhishek B. Akkur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write assist circuitry
- Patent number 11,043,262
- Issue date Jun 22, 2021
- ARM Limited
- Arjunesh Namboothiri Madhavan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit using discharging circuitries for bit lines
- Patent number 10,878,892
- Issue date Dec 29, 2020
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Routing structures for memory applications
- Patent number 10,839,861
- Issue date Nov 17, 2020
- ARM Limited
- Vivek Nautiyal
- G11 - INFORMATION STORAGE
Information Patent Grant
Coupling compensation circuitry
- Patent number 10,755,774
- Issue date Aug 25, 2020
- ARM Limited
- Vivek Nautiyal
- G11 - INFORMATION STORAGE
Information Patent Grant
Dummy bitline circuitry
- Patent number 10,748,583
- Issue date Aug 18, 2020
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
High-speed memory architecture
- Patent number 10,622,038
- Issue date Apr 14, 2020
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Coupling compensation circuitry
- Patent number 10,600,477
- Issue date Mar 24, 2020
- ARM Limited
- Vivek Nautiyal
- G11 - INFORMATION STORAGE
Information Patent Grant
Power-on-reset circuit
- Patent number 10,425,076
- Issue date Sep 24, 2019
- ARM Limited
- Lalit Gupta
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dummy wordline tracking circuitry
- Patent number 10,269,416
- Issue date Apr 23, 2019
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Bitline write assist circuitry
- Patent number 10,217,496
- Issue date Feb 26, 2019
- ARM Limited
- Vivek Nautiyal
- G11 - INFORMATION STORAGE
Information Patent Grant
Skewed corner tracking for memory write operations
- Patent number 10,147,482
- Issue date Dec 4, 2018
- ARM Limited
- Jitendra Dasani
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit using shaping and timing circuitries
- Patent number 10,074,410
- Issue date Sep 11, 2018
- ARM Limited
- Vivek Nautiyal
- G11 - INFORMATION STORAGE
Information Patent Grant
Power-on-reset circuit
- Patent number 10,033,376
- Issue date Jul 24, 2018
- ARM Limited
- Lalit Gupta
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Redundancy schemes for memory cell repair
- Patent number 9,911,510
- Issue date Mar 6, 2018
- ARM Limited
- Jungtae Kwon
- G11 - INFORMATION STORAGE
Information Patent Grant
Read assist circuitry
- Patent number 9,824,749
- Issue date Nov 21, 2017
- ARM Limited
- Vivek Nautiyal
- G11 - INFORMATION STORAGE
Information Patent Grant
Redundancy schemes for memory
- Patent number 9,711,243
- Issue date Jul 18, 2017
- ARM Limited
- Vivek Nautiyal
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Column Redundancy Techniques
- Publication number 20230016339
- Publication date Jan 19, 2023
- ARM Limited
- Yew Keong Chong
- G11 - INFORMATION STORAGE
Information Patent Application
Coupling Compensation Circuitry
- Publication number 20200219559
- Publication date Jul 9, 2020
- ARM Limited
- Vivek Nautiyal
- G11 - INFORMATION STORAGE
Information Patent Application
High-Speed Memory Architecture
- Publication number 20200005836
- Publication date Jan 2, 2020
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
Coupling Compensation Circuitry
- Publication number 20190325948
- Publication date Oct 24, 2019
- ARM Limited
- Vivek Nautiyal
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuit Using Discharging Circuitries for Bit Lines
- Publication number 20190325949
- Publication date Oct 24, 2019
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
Routing Structures for Memory Applications
- Publication number 20190237111
- Publication date Aug 1, 2019
- Vivek Nautiyal
- G11 - INFORMATION STORAGE
Information Patent Application
Write Assist Circuitry
- Publication number 20190237135
- Publication date Aug 1, 2019
- ARM Limited
- Arjunesh Namboothiri Madhavan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dummy Bitline Circuitry
- Publication number 20190198064
- Publication date Jun 27, 2019
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
Dummy Wordline Tracking Circuitry
- Publication number 20190122724
- Publication date Apr 25, 2019
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
Self-Timing Path with Substrate-Connected Dummy Bitline
- Publication number 20190057735
- Publication date Feb 21, 2019
- ARM Limited
- Abhishek B. Akkur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Power-On-Reset Circuit
- Publication number 20180331681
- Publication date Nov 15, 2018
- ARM Limited
- Lalit Gupta
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Skewed Corner Tracking for Memory Write Operations
- Publication number 20180268894
- Publication date Sep 20, 2018
- ARM Limited
- Jitendra Dasani
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuit Using Shaping and Timing Circuitries
- Publication number 20180096715
- Publication date Apr 5, 2018
- ARM Limited
- Vivek Nautiyal
- G11 - INFORMATION STORAGE
Information Patent Application
Power-On-Reset Circuit
- Publication number 20170317672
- Publication date Nov 2, 2017
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE

Vivek Nautiyal

Person

Patents Grantslast 30 patents

Column redundancy techniques

Dummy bitline circuitry

Write assist circuitry

Integrated circuit using discharging circuitries for bit lines

Routing structures for memory applications

Coupling compensation circuitry

Dummy bitline circuitry

High-speed memory architecture

Coupling compensation circuitry

Power-on-reset circuit

Dummy wordline tracking circuitry

Bitline write assist circuitry

Skewed corner tracking for memory write operations

Integrated circuit using shaping and timing circuitries

Power-on-reset circuit

Redundancy schemes for memory cell repair

Read assist circuitry

Redundancy schemes for memory

Patents Applicationslast 30 patents

Column Redundancy Techniques

Coupling Compensation Circuitry

High-Speed Memory Architecture

Coupling Compensation Circuitry

Integrated Circuit Using Discharging Circuitries for Bit Lines

Routing Structures for Memory Applications

Write Assist Circuitry

Dummy Bitline Circuitry

Dummy Wordline Tracking Circuitry

Self-Timing Path with Substrate-Connected Dummy Bitline

Power-On-Reset Circuit

Skewed Corner Tracking for Memory Write Operations

Integrated Circuit Using Shaping and Timing Circuitries

Power-On-Reset Circuit