Vivek Sarda

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Data protocol over clock line
- Patent number 12,206,752
- Issue date Jan 21, 2025
- Skyworks Solutions, Inc.
- Vivek Sarda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Secondary phase compensation assist for PLL IO delay aligning sync...
- Patent number 12,200,091
- Issue date Jan 14, 2025
- Skyworks Solutions, Inc.
- Vivek Sarda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Secondary phase compensation assist for PLL IO delay
- Patent number 12,200,097
- Issue date Jan 14, 2025
- Skyworks Solutions, Inc.
- Vivek Sarda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Maintaining a virtual time of day
- Patent number 12,021,960
- Issue date Jun 25, 2024
- Skyworks Solutions, Inc.
- Vivek Sarda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Signal delay control using a recirculating delay loop and a phase i...
- Patent number 11,973,505
- Issue date Apr 30, 2024
- Skyworks Solutions, Inc.
- Vivek Sarda
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
FSYNC mismatch tracking
- Patent number 11,876,607
- Issue date Jan 16, 2024
- Skyworks Solutions, Inc.
- Vivek Sarda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Phase transport with frequency translation without a PLL
- Patent number 11,777,703
- Issue date Oct 3, 2023
- Skyworks Solutions, Inc.
- Vivek Sarda
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Secondary phase compensation assist for PLL IO delay
- Patent number 11,671,238
- Issue date Jun 6, 2023
- Skyworks Solutions, Inc.
- Vivek Sarda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Secondary phase compensation assist for PLL IO delay aligning sync...
- Patent number 11,664,968
- Issue date May 30, 2023
- Skyworks Solutions, Inc.
- Vivek Sarda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Signal delay control using a recirculating delay loop and a phase i...
- Patent number 11,595,032
- Issue date Feb 28, 2023
- Skyworks Solutions, Inc.
- Vivek Sarda
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Data protocol over clock line
- Patent number 11,502,812
- Issue date Nov 15, 2022
- Skyworks Solutions, Inc.
- Vivek Sarda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
FSYNC mismatch tracking
- Patent number 11,502,764
- Issue date Nov 15, 2022
- Skyworks Solutions, Inc.
- Vivek Sarda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Clock skew detection and management
- Patent number 11,392,166
- Issue date Jul 19, 2022
- Silicon Laboratories Inc.
- Vivek Sarda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Phase transport with frequency translation without a PLL
- Patent number 11,290,250
- Issue date Mar 29, 2022
- Skyworks Solutions, Inc.
- Vivek Sarda
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Secondary phase compensation assist for PLL IO delay
- Patent number 11,088,819
- Issue date Aug 10, 2021
- Silicon Laboratories Inc.
- Vivek Sarda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Secondary phase compensation assist for PLL IO delay aligning sync...
- Patent number 11,088,816
- Issue date Aug 10, 2021
- Silicon Laboratories Inc.
- Vivek Sarda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Data handoff between two clock domains sharing a fundamental beat
- Patent number 11,061,432
- Issue date Jul 13, 2021
- Silicon Laboratories Inc.
- Vivek Sarda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Detection and management of frequency errors in a reference input c...
- Patent number 10,908,635
- Issue date Feb 2, 2021
- Silicon Laboratories Inc.
- Harihara Subramanian Ranganathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Regulator control during scan shift and capture cycles
- Patent number 10,712,390
- Issue date Jul 14, 2020
- Silicon Laboratories Inc.
- Vivek Sarda
- G01 - MEASURING TESTING
Information Patent Grant
Delay adjustment using frequency estimation
- Patent number 10,608,647
- Issue date Mar 31, 2020
- Silicon Laboratories Inc.
- Harihara Subramanian Ranganathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Transition scan coverage for cross clock domain logic
- Patent number 10,520,547
- Issue date Dec 31, 2019
- Silicon Laboratories Inc.
- Vivek Sarda
- G01 - MEASURING TESTING
Information Patent Grant
Adaptive jitter and spur adjustment for clock circuits
- Patent number 10,511,315
- Issue date Dec 17, 2019
- Silicon Laboratories Inc.
- Vivek Sarda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Failsafe clock product using frequency estimation
- Patent number 10,483,987
- Issue date Nov 19, 2019
- Silicon Laboratories Inc.
- Harihara Subramanian Ranganathan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High frequency synthesis and duty cycle control with interpolative...
- Patent number 10,270,457
- Issue date Apr 23, 2019
- Silicon Laboratories Inc.
- Vivek Sarda
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital fast lock for phase-locked loops
- Patent number 10,075,173
- Issue date Sep 11, 2018
- Silicon Laboratories Inc.
- Vivek Sarda
- G01 - MEASURING TESTING
Information Patent Grant
Frequency adjustment for clock generator
- Patent number 7,800,451
- Issue date Sep 21, 2010
- Silicon Laboratories Inc.
- Zhuo Fu
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
MAINTAINING A VIRTUAL TIME OF DAY
- Publication number 20240430070
- Publication date Dec 26, 2024
- Skyworks Solutions, Inc.
- Vivek Sarda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
FSYNC MISMATCH TRACKING
- Publication number 20240223294
- Publication date Jul 4, 2024
- Skyworks Solutions, Inc.
- Vivek Sarda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SECONDARY PHASE COMPENSATION ASSIST FOR PLL IO DELAY ALIGNING SYNC...
- Publication number 20230421345
- Publication date Dec 28, 2023
- Skyworks Solutions, Inc.
- Vivek Sarda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SECONDARY PHASE COMPENSATION ASSIST FOR PLL IO DELAY
- Publication number 20230379132
- Publication date Nov 23, 2023
- Skyworks Solutions, Inc.
- Vivek Sarda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SIGNAL DELAY CONTROL USING A RECIRCULATING DELAY LOOP AND A PHASE I...
- Publication number 20230283270
- Publication date Sep 7, 2023
- Skyworks Solutions, Inc.
- Vivek Sarda
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DATA PROTOCOL OVER CLOCK LINE
- Publication number 20230224137
- Publication date Jul 13, 2023
- Skyworks Solutions, Inc.
- Vivek Sarda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
FSYNC MISMATCH TRACKING
- Publication number 20230188237
- Publication date Jun 15, 2023
- Skyworks Solutions, Inc.
- Vivek Sarda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MAINTAINING A VIRTUAL TIME OF DAY
- Publication number 20230095364
- Publication date Mar 30, 2023
- Skyworks Solutions, Inc.
- Vivek Sarda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SIGNAL DELAY CONTROL USING A RECIRCULATING DELAY LOOP AND A PHASE I...
- Publication number 20220385281
- Publication date Dec 1, 2022
- Skyworks Solutions, Inc.
- Vivek Sarda
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PHASE TRANSPORT WITH FREQUENCY TRANSLATION WITHOUT A PLL
- Publication number 20220216981
- Publication date Jul 7, 2022
- Skyworks Solutions, Inc.
- Vivek Sarda
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FSYNC MISMATCH TRACKING
- Publication number 20220209880
- Publication date Jun 30, 2022
- Skyworks Solutions, Inc.
- Vivek Sarda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SECONDARY PHASE COMPENSATION ASSIST FOR PLL IO DELAY ALIGNING SYNC...
- Publication number 20210367748
- Publication date Nov 25, 2021
- Skyworks Solutions, Inc.
- Vivek Sarda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SECONDARY PHASE COMPENSATION ASSIST FOR PLL IO DELAY
- Publication number 20210367751
- Publication date Nov 25, 2021
- Skyworks Solutions, Inc.
- Vivek Sarda
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PHASE TRANSPORT WITH FREQUENCY TRANSLATION WITHOUT A PLL
- Publication number 20210328758
- Publication date Oct 21, 2021
- Silicon Laboratories Inc.
- Vivek Sarda
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DATA HANDOFF BETWEEN TWO CLOCK DOMAINS SHARING A FUNDAMENTAL BEAT
- Publication number 20210157355
- Publication date May 27, 2021
- Silicon Laboratories Inc.
- Vivek Sarda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCK SKEW DETECTION AND MANAGEMENT
- Publication number 20210157356
- Publication date May 27, 2021
- Silicon Laboratories Inc.
- Vivek Sarda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MAINTAINING THE CORRECT TIME WHEN COUNTER VALUES ARE TRANSFERRED BE...
- Publication number 20200285265
- Publication date Sep 10, 2020
- Silicon Laboratories Inc.
- Harihara Subramanian Ranganathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSITION SCAN COVERAGE FOR CROSS CLOCK DOMAIN LOGIC
- Publication number 20190101590
- Publication date Apr 4, 2019
- Silicon Laboratories Inc.
- Vivek Sarda
- G01 - MEASURING TESTING
Information Patent Application
REGULATOR CONTROL DURING SCAN SHIFT AND CAPTURE CYCLES
- Publication number 20190094302
- Publication date Mar 28, 2019
- Silicon Laboratories Inc.
- Vivek Sarda
- G05 - CONTROLLING REGULATING
Information Patent Application
HIGH FREQUENCY SYNTHESIS AND DUTY CYCLE CONTROL WITH INTERPOLATIVE...
- Publication number 20180175871
- Publication date Jun 21, 2018
- Silicon Laboratories Inc.
- Vivek Sarda
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Digital Fast Lock For Phase-Locked Loops
- Publication number 20180145696
- Publication date May 24, 2018
- Silicon Laboratories Inc.
- Vivek Sarda
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Receiver Circuits and Systems for Receiving Medium Wave and Short W...
- Publication number 20120183102
- Publication date Jul 19, 2012
- SILICON LABORATORIES, INC.
- Scott Willingham
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
FREQUENCY ADJUSTMENT FOR CLOCK GENERATOR
- Publication number 20100045395
- Publication date Feb 25, 2010
- Zhuo Fu
- G06 - COMPUTING CALCULATING COUNTING

Vivek Sarda

Person

Patents Grantslast 30 patents

Data protocol over clock line

Secondary phase compensation assist for PLL IO delay aligning sync...

Secondary phase compensation assist for PLL IO delay

Maintaining a virtual time of day

Signal delay control using a recirculating delay loop and a phase i...

FSYNC mismatch tracking

Phase transport with frequency translation without a PLL

Secondary phase compensation assist for PLL IO delay

Secondary phase compensation assist for PLL IO delay aligning sync...

Signal delay control using a recirculating delay loop and a phase i...

Data protocol over clock line

FSYNC mismatch tracking

Clock skew detection and management

Phase transport with frequency translation without a PLL

Secondary phase compensation assist for PLL IO delay

Secondary phase compensation assist for PLL IO delay aligning sync...

Data handoff between two clock domains sharing a fundamental beat

Detection and management of frequency errors in a reference input c...

Regulator control during scan shift and capture cycles

Delay adjustment using frequency estimation

Transition scan coverage for cross clock domain logic

Adaptive jitter and spur adjustment for clock circuits

Failsafe clock product using frequency estimation

High frequency synthesis and duty cycle control with interpolative...

Digital fast lock for phase-locked loops

Frequency adjustment for clock generator

Patents Applicationslast 30 patents

MAINTAINING A VIRTUAL TIME OF DAY

FSYNC MISMATCH TRACKING

SECONDARY PHASE COMPENSATION ASSIST FOR PLL IO DELAY ALIGNING SYNC...

SECONDARY PHASE COMPENSATION ASSIST FOR PLL IO DELAY

SIGNAL DELAY CONTROL USING A RECIRCULATING DELAY LOOP AND A PHASE I...

DATA PROTOCOL OVER CLOCK LINE

FSYNC MISMATCH TRACKING

MAINTAINING A VIRTUAL TIME OF DAY

SIGNAL DELAY CONTROL USING A RECIRCULATING DELAY LOOP AND A PHASE I...

PHASE TRANSPORT WITH FREQUENCY TRANSLATION WITHOUT A PLL

FSYNC MISMATCH TRACKING

SECONDARY PHASE COMPENSATION ASSIST FOR PLL IO DELAY ALIGNING SYNC...

SECONDARY PHASE COMPENSATION ASSIST FOR PLL IO DELAY

PHASE TRANSPORT WITH FREQUENCY TRANSLATION WITHOUT A PLL

DATA HANDOFF BETWEEN TWO CLOCK DOMAINS SHARING A FUNDAMENTAL BEAT

CLOCK SKEW DETECTION AND MANAGEMENT

MAINTAINING THE CORRECT TIME WHEN COUNTER VALUES ARE TRANSFERRED BE...

TRANSITION SCAN COVERAGE FOR CROSS CLOCK DOMAIN LOGIC

REGULATOR CONTROL DURING SCAN SHIFT AND CAPTURE CYCLES

HIGH FREQUENCY SYNTHESIS AND DUTY CYCLE CONTROL WITH INTERPOLATIVE...

Digital Fast Lock For Phase-Locked Loops

Receiver Circuits and Systems for Receiving Medium Wave and Short W...

FREQUENCY ADJUSTMENT FOR CLOCK GENERATOR