Vu Q. Ho

Person

Kanata, CA

People

Patents Grantslast 30 patents

Information Patent Grant
Structure and method of making a capacitor for an intergrated circuit
- Patent number 5,452,178
- Issue date Sep 19, 1995
- Northern Telecom Limited
- Ismail T. Emesh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making a capacitor for an integrated circuit
- Patent number 5,330,931
- Issue date Jul 19, 1994
- Northern Telecom Limited
- Ismail T. Emesh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making interconnect structures for VLSI devices
- Patent number 4,954,214
- Issue date Sep 4, 1990
- Northern Telecom Limited
- Vu Quoc Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of filling contact holes for semiconductor devices and conta...
- Patent number 4,898,841
- Issue date Feb 6, 1990
- Northern Telecom Limited
- Vu Q. Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process of fabricating MOS devices having shallow source and drain...
- Patent number 4,683,645
- Issue date Aug 4, 1987
- Northern Telecom Limited
- Hussein M. Naguib
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Forming low resistivity hillock free conductors in VLSI devices
- Patent number 4,680,854
- Issue date Jul 21, 1987
- Northern Telecom Limited
- Vu Q. Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for improving step coverage of dielectrics in VLSI circuits
- Patent number 4,601,781
- Issue date Jul 22, 1986
- Northern Telecom Limited
- Jacques S. Mercier
- H01 - BASIC ELECTRIC ELEMENTS

Person

Patents Grantslast 30 patents

Structure and method of making a capacitor for an intergrated circuit

Method of making a capacitor for an integrated circuit

Method for making interconnect structures for VLSI devices

Method of filling contact holes for semiconductor devices and conta...

Process of fabricating MOS devices having shallow source and drain...

Forming low resistivity hillock free conductors in VLSI devices

Method for improving step coverage of dielectrics in VLSI circuits