Wae Chet YONG

Person

Melaka, MY

People

Patents Grantslast 30 patents

Information Patent Grant
Chip to chip interconnect in encapsulant of molded semiconductor pa...
- Patent number 11,569,196
- Issue date Jan 31, 2023
- Infineon Technologies AG
- Khay Chwan Saw
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip to chip interconnect in encapsulant of molded semiconductor pa...
- Patent number 11,133,281
- Issue date Sep 28, 2021
- Infineon Technologies AG
- Khay Chwan Saw
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Encapsulated leadless package having an at least partially exposed...
- Patent number 10,978,378
- Issue date Apr 13, 2021
- Infineon Technologies AG
- Thomas Bemmerl
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a semiconductor package with mold lock opening
- Patent number 8,466,009
- Issue date Jun 18, 2013
- Infineon Technologies AG
- Bernd Goller
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a semiconductor device having a resin with wa...
- Patent number 8,377,753
- Issue date Feb 19, 2013
- Infineon Technologies AG
- Chai Wei Heng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic component and a method of fabricating an electronic comp...
- Patent number 8,207,601
- Issue date Jun 26, 2012
- Infinen Technologies AG
- Khai Huat Jeffrey Low
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated semiconductor outline package
- Patent number 8,169,069
- Issue date May 1, 2012
- Infineon Technologies AG
- Stanley Job Doraisamy
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Semiconductor device including isolation layer
- Patent number 8,110,906
- Issue date Feb 7, 2012
- Infineon Technologies AG
- Joachim Mahler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor devices having a resin with warpage compensated surfaces
- Patent number 8,067,841
- Issue date Nov 29, 2011
- Infineon Technologies AG
- Chai Wei Heng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device
- Patent number 7,821,141
- Issue date Oct 26, 2010
- Infineon Technologies AG
- Wae Chet Yong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor component having maximized bonding areas of electrica...
- Patent number 7,791,182
- Issue date Sep 7, 2010
- Infineon Technologies AG
- Wae Chet Yong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with mold lock vent
- Patent number 7,732,937
- Issue date Jun 8, 2010
- Infineon Technologies AG
- Bernd Goller
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming component package
- Patent number 7,723,165
- Issue date May 25, 2010
- Infineon Technologies AG
- Soon Hock Tong
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Chip to Chip Interconnect in Encapsulant of Molded Semiconductor Pa...
- Publication number 20210391298
- Publication date Dec 16, 2021
- Khay Chwan Saw
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Chip to Chip Interconnect in Encapsulant of Molded Semiconductor Pa...
- Publication number 20200321276
- Publication date Oct 8, 2020
- Khay Chwan Saw
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Encapsulated Leadless Package Having an at Least Partially Exposed...
- Publication number 20190189542
- Publication date Jun 20, 2019
- INFINEON TECHNOLOGIES AG
- Thomas Bemmerl
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Semiconductor Outline Package
- Publication number 20120162924
- Publication date Jun 28, 2012
- Infineon Technologies AG
- Stanley Job Doraisamy
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method of Fabricating A Semiconductor Device Having A Resin With Wa...
- Publication number 20120058606
- Publication date Mar 8, 2012
- INFINEON TECHNOLOGIES AG
- Chai Wei Heng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING A SEMICONDUCTOR PACKAGE WITH MOLD LOCK OPENING
- Publication number 20100227436
- Publication date Sep 9, 2010
- INFINEON TECHNOLOGIES AG
- Bernd Goller
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE WITH MOLD LOCK VENT
- Publication number 20090224382
- Publication date Sep 10, 2009
- INFINEON TECHNOLOGIES AG
- Bernd Goller
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device
- Publication number 20090212417
- Publication date Aug 27, 2009
- Wae Chet Yong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device
- Publication number 20090212446
- Publication date Aug 27, 2009
- Chai Wei Heng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR COMPONENT AND METHOD OF PRODUCING
- Publication number 20090045493
- Publication date Feb 19, 2009
- INFINEON TECHNOLOGIES AG
- Wae Chet Yong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electronic Component and a Method of Fabricating an Electronic Comp...
- Publication number 20090001536
- Publication date Jan 1, 2009
- INFINEON TECHNOLOGIES AG
- Khai Huat Jeffrey Low
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING ISOLATION LAYER
- Publication number 20080173992
- Publication date Jul 24, 2008
- Infineon Technologies AG
- Joachim Mahler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of Forming Component Package
- Publication number 20080160677
- Publication date Jul 3, 2008
- Soon Hock TONG
- H01 - BASIC ELECTRIC ELEMENTS

Wae Chet YONG

Person

Patents Grantslast 30 patents

Chip to chip interconnect in encapsulant of molded semiconductor pa...

Chip to chip interconnect in encapsulant of molded semiconductor pa...

Encapsulated leadless package having an at least partially exposed...

Method of fabricating a semiconductor package with mold lock opening

Method of fabricating a semiconductor device having a resin with wa...

Electronic component and a method of fabricating an electronic comp...

Integrated semiconductor outline package

Semiconductor device including isolation layer

Semiconductor devices having a resin with warpage compensated surfaces

Semiconductor device

Semiconductor component having maximized bonding areas of electrica...

Semiconductor package with mold lock vent

Method of forming component package

Patents Applicationslast 30 patents

Chip to Chip Interconnect in Encapsulant of Molded Semiconductor Pa...

Chip to Chip Interconnect in Encapsulant of Molded Semiconductor Pa...

Encapsulated Leadless Package Having an at Least Partially Exposed...

Integrated Semiconductor Outline Package

Method of Fabricating A Semiconductor Device Having A Resin With Wa...

METHOD OF FABRICATING A SEMICONDUCTOR PACKAGE WITH MOLD LOCK OPENING

SEMICONDUCTOR PACKAGE WITH MOLD LOCK VENT

Semiconductor Device

Semiconductor Device

SEMICONDUCTOR COMPONENT AND METHOD OF PRODUCING

Electronic Component and a Method of Fabricating an Electronic Comp...

SEMICONDUCTOR DEVICE INCLUDING ISOLATION LAYER

Method of Forming Component Package