Walter Lipponer

Person

Ammerbuch, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Evicting cached stores
- Patent number 9,886,395
- Issue date Feb 6, 2018
- International Business Machines Corporation
- Uwe Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Evicting cached stores
- Patent number 9,658,967
- Issue date May 23, 2017
- International Business Machines Corporation
- Uwe Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Store cache for transactional memory
- Patent number 9,588,894
- Issue date Mar 7, 2017
- International Business Machines Corporation
- Uwe Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Store cache for transactional memory
- Patent number 9,588,893
- Issue date Mar 7, 2017
- International Business Machines Corporation
- Uwe Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enhanced wiring structure for a cache supporting auxiliary data output
- Patent number 8,891,279
- Issue date Nov 18, 2014
- International Business Machines Corporation
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing latency in a channel adapter by accelerated I/O control bl...
- Patent number 7,466,716
- Issue date Dec 16, 2008
- International Business Machines Corporation
- Rainer Dorsch
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Memory card interface method using multiplexed storage protect key...
- Patent number 6,182,174
- Issue date Jan 30, 2001
- International Business Machines Corporation
- Kevin W. Kark
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory implemented error detection and correction code capable of d...
- Patent number 5,768,294
- Issue date Jun 16, 1998
- International Business Machines Corporation
- Chin-Long Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory implemented error detection and correction code using memory...
- Patent number 5,761,221
- Issue date Jun 2, 1998
- International Business Machines Corporation
- Klaus Ruediger Baat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory implemented error detection and correction code with address...
- Patent number 5,751,745
- Issue date May 12, 1998
- International Business Machines Corporation
- Chin-Long Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory implemented error detection and correction code with address...
- Patent number 5,691,996
- Issue date Nov 25, 1997
- International Business Machines Corporation
- Chin-Long Chen
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
STORE CACHE FOR TRANSACTIONAL MEMORY
- Publication number 20160132434
- Publication date May 12, 2016
- International Business Machines Corporation
- Uwe Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORE CACHE FOR TRANSACTIONAL MEMORY
- Publication number 20160132431
- Publication date May 12, 2016
- International Business Machines Corporation
- Uwe Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EVICTING CACHED STORES
- Publication number 20160070654
- Publication date Mar 10, 2016
- International Business Machines Corporation
- Uwe Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EVICTING CACHED STORES
- Publication number 20150378924
- Publication date Dec 31, 2015
- International Business Machines Corporation
- Uwe Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Enhanced Wiring Structure for a Cache Supporting Auxiliary Data Output
- Publication number 20140082290
- Publication date Mar 20, 2014
- International Business Machines Corporation
- Christian Habermann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reducing latency in a channel adapter by accelerated I/O control bl...
- Publication number 20060029088
- Publication date Feb 9, 2006
- International Business Machines Corporation
- Rainer Dorsch
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Channel adapter managed trusted queue pairs
- Publication number 20060013397
- Publication date Jan 19, 2006
- International Business Machines Corporation
- Rainer Dorsch
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Walter Lipponer

Person

Patents Grantslast 30 patents

Evicting cached stores

Evicting cached stores

Store cache for transactional memory

Store cache for transactional memory

Enhanced wiring structure for a cache supporting auxiliary data output

Reducing latency in a channel adapter by accelerated I/O control bl...

Memory card interface method using multiplexed storage protect key...

Memory implemented error detection and correction code capable of d...

Memory implemented error detection and correction code using memory...

Memory implemented error detection and correction code with address...

Memory implemented error detection and correction code with address...

Patents Applicationslast 30 patents

STORE CACHE FOR TRANSACTIONAL MEMORY

STORE CACHE FOR TRANSACTIONAL MEMORY

EVICTING CACHED STORES

EVICTING CACHED STORES

Enhanced Wiring Structure for a Cache Supporting Auxiliary Data Output

Reducing latency in a channel adapter by accelerated I/O control bl...

Channel adapter managed trusted queue pairs