Ward M. Parkinson

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Concurrent multi-bit self-referenced read of programmable resistanc...
- Patent number 12,237,010
- Issue date Feb 25, 2025
- SanDisk Technologies, Inc.
- Nathan Franklin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Concurrent write to programmable resistance memory cells in cross-p...
- Patent number 12,205,638
- Issue date Jan 21, 2025
- SANDISK TECHNOLOGIES LLC
- Nathan Franklin
- G11 - INFORMATION STORAGE
Information Patent Grant
Cross-point array IHOLD read margin improvement
- Patent number 12,148,459
- Issue date Nov 19, 2024
- SanDisk Technologies LLC
- Ward Parkinson
- G11 - INFORMATION STORAGE
Information Patent Grant
Mixed current-forced read scheme for MRAM array with selector
- Patent number 11,978,491
- Issue date May 7, 2024
- SANDISK TECHNOLOGIES LLC
- Michael Nicolas Albert Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Current mirror circuits
- Patent number 11,971,736
- Issue date Apr 30, 2024
- SANDISK TECHNOLOGIES LLC
- James O'Toole
- G05 - CONTROLLING REGULATING
Information Patent Grant
Programmable ECC for MRAM mixed-read scheme
- Patent number 11,972,822
- Issue date Apr 30, 2024
- SANDISK TECHNOLOGIES LLC
- Martin Hassner
- G11 - INFORMATION STORAGE
Information Patent Grant
Cross-point array refresh scheme
- Patent number 11,972,787
- Issue date Apr 30, 2024
- SANDISK TECHNOLOGIES LLC
- Michael Nicolas Albert Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signal amplification in MRAM during reading, including a pair of co...
- Patent number 11,854,592
- Issue date Dec 26, 2023
- SanDisk Technologies LLC
- Ward Parkinson
- G11 - INFORMATION STORAGE
Information Patent Grant
Power off recovery in cross-point memory with threshold switching s...
- Patent number 11,783,895
- Issue date Oct 10, 2023
- SanDisk Technologies LLC
- Neil Robertson
- G11 - INFORMATION STORAGE
Information Patent Grant
Forced current access with voltage clamping in cross-point array
- Patent number 11,688,446
- Issue date Jun 27, 2023
- SanDisk Technologies LLC
- Michael Nicolas Albert Tran
- G11 - INFORMATION STORAGE
Information Patent Grant
Forced current access with voltage clamping in cross-point array
- Patent number 11,682,442
- Issue date Jun 20, 2023
- SanDisk Technologies LLC
- Michael Nicolas Albert Tran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power off recovery in cross-point memory with threshold switching s...
- Patent number 11,501,831
- Issue date Nov 15, 2022
- SanDisk Technologies LLC
- Neil Robertson
- G11 - INFORMATION STORAGE
Information Patent Grant
Concurrent multi-bit access in cross-point array
- Patent number 11,488,662
- Issue date Nov 1, 2022
- SanDisk Technologies LLC
- Nathan Franklin
- G11 - INFORMATION STORAGE
Information Patent Grant
Forced current access with voltage clamping in cross-point array
- Patent number 11,398,262
- Issue date Jul 26, 2022
- SanDisk Technologies LLC
- Michael Nicolas Albert Tran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Signal amplification in MRAM during reading, including a pair of co...
- Patent number 11,386,945
- Issue date Jul 12, 2022
- SanDisk Technologies LLC
- Ward Parkinson
- G11 - INFORMATION STORAGE
Information Patent Grant
Signal preserve in MRAM during reading
- Patent number 11,328,759
- Issue date May 10, 2022
- SanDisk Technologies LLC
- Ward Parkinson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MRAM cross-point memory with reversed MRAM element vertical orienta...
- Patent number 11,222,678
- Issue date Jan 11, 2022
- SanDisk Technologies LLC
- Ward Parkinson
- G11 - INFORMATION STORAGE
Information Patent Grant
Crosspoint memory architecture for high bandwidth operation with sm...
- Patent number 11,099,784
- Issue date Aug 24, 2021
- SanDisk Technologies LLC
- Won Ho Choi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data rewrite during refresh window
- Patent number 10,885,991
- Issue date Jan 5, 2021
- SanDisk Technologies LLC
- Ward Parkinson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Phase change memory device with reduced read disturb and method of...
- Patent number 10,622,063
- Issue date Apr 14, 2020
- SanDisk Technologies LLC
- Michael Grobis
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory maintenance operations during refresh window
- Patent number 10,545,692
- Issue date Jan 28, 2020
- SanDisk Technologies LLC
- Nathan Franklin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cross-point memory array addressing
- Patent number 10,497,438
- Issue date Dec 3, 2019
- SanDisk Technologies LLC
- Won Ho Choi
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistance and gate control in decoder circuits for read and write...
- Patent number 10,438,657
- Issue date Oct 8, 2019
- SanDisk Technologies LLC
- Ward Parkinson
- G11 - INFORMATION STORAGE
Information Patent Grant
Write set operation for memory device with bit line capacitor drive
- Patent number 10,373,682
- Issue date Aug 6, 2019
- SanDisk Technologies LLC
- Ward Parkinson
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiple-mode current sources for sense operations
- Patent number 10,311,921
- Issue date Jun 4, 2019
- SanDisk Technologies LLC
- Ward Parkinson
- G11 - INFORMATION STORAGE
Information Patent Grant
Bi-directional RRAM decoder-driver
- Patent number 10,255,953
- Issue date Apr 9, 2019
- Western Digital Technologies, Inc.
- James Edwin O'Toole
- G11 - INFORMATION STORAGE
Information Patent Grant
Ovonic threshold switch (OTS) driver/selector uses unselect bias to...
- Patent number 10,192,616
- Issue date Jan 29, 2019
- Western Digital Technologies, Inc.
- James Edwin O'Toole
- G11 - INFORMATION STORAGE
Information Patent Grant
Bi-directional RRAM decoder-driver
- Patent number 9,887,004
- Issue date Feb 6, 2018
- Western Digital Technologies, Inc.
- James Edwin O'Toole
- G11 - INFORMATION STORAGE
Information Patent Grant
NMOS regulated voltage reference
- Patent number 9,753,481
- Issue date Sep 5, 2017
- HGST, INC.
- R. Jacob Baker
- G05 - CONTROLLING REGULATING
Information Patent Grant
Method and apparatus for decoding memory
- Patent number 9,576,648
- Issue date Feb 21, 2017
- OVONYX MEMORY TECHNOLOGY, LLC
- Ward Parkinson
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
CURRENT SOURCE FOR READ OF PROGRAMMABLE RESISTANCE MEMORY CELLS
- Publication number 20240395301
- Publication date Nov 28, 2024
- Western Digital Technologies, Inc.
- Christopher J. Petti
- G11 - INFORMATION STORAGE
Information Patent Application
CROSS-POINT ARRAY REFRESH SCHEME
- Publication number 20240265958
- Publication date Aug 8, 2024
- SanDisk Technologies LLC
- Michael Nicolas Albert Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAST SELF-REFERENCED READ OF PROGRAMMABLE RESISTANCE MEMORY CELLS
- Publication number 20240184478
- Publication date Jun 6, 2024
- SANDISK TECHNOLOGIES LLC
- Dimitri Houssameddine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CROSS-POINT ARRAY REFRESH SCHEME
- Publication number 20230386543
- Publication date Nov 30, 2023
- SANDISK TECHNOLOGIES LLC
- Michael Nicolas Albert Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CROSS-POINT ARRAY IHOLD READ MARGIN IMPROVEMENT
- Publication number 20230267981
- Publication date Aug 24, 2023
- SANDISK TECHNOLOGIES LLC
- Ward Parkinson
- G11 - INFORMATION STORAGE
Information Patent Application
CURRENT MIRROR CIRCUITS
- Publication number 20230259149
- Publication date Aug 17, 2023
- SANDISK TECHNOLOGIES LLC
- James O'Toole
- G05 - CONTROLLING REGULATING
Information Patent Application
PROGRAMMABLE ECC FOR MRAM MIXED-READ SCHEME
- Publication number 20230101414
- Publication date Mar 30, 2023
- SANDISK TECHNOLOGIES LLC
- Martin Hassner
- G11 - INFORMATION STORAGE
Information Patent Application
MIXED CURRENT-FORCED READ SCHEME FOR RERAM ARRAY WITH SELECTOR
- Publication number 20230100600
- Publication date Mar 30, 2023
- SANDISK TECHNOLOGIES LLC
- Michael Nicolas Albert Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER OFF RECOVERY IN CROSS-POINT MEMORY WITH THRESHOLD SWITCHING S...
- Publication number 20230005539
- Publication date Jan 5, 2023
- SANDISK TECHNOLOGIES LLC
- Neil Robertson
- G11 - INFORMATION STORAGE
Information Patent Application
CONCURRENT MULTI-BIT ACCESS IN CROSS-POINT ARRAY
- Publication number 20230005530
- Publication date Jan 5, 2023
- SANDISK TECHNOLOGIES LLC
- Nathan Franklin
- G11 - INFORMATION STORAGE
Information Patent Application
CONCURRENT MULTI-BIT ACCESS IN CROSS-POINT ARRAY
- Publication number 20220415387
- Publication date Dec 29, 2022
- SANDISK TECHNOLOGIES LLC
- Nathan Franklin
- G11 - INFORMATION STORAGE
Information Patent Application
FORCED CURRENT ACCESS WITH VOLTAGE CLAMPING IN CROSS-POINT ARRAY
- Publication number 20220335999
- Publication date Oct 20, 2022
- SANDISK TECHNOLOGIES LLC
- Michael Nicolas Albert Tran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FORCED CURRENT ACCESS WITH VOLTAGE CLAMPING IN CROSS-POINT ARRAY
- Publication number 20220335998
- Publication date Oct 20, 2022
- SANDISK TECHNOLOGIES LLC
- Michael Nicolas Albert Tran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SIGNAL AMPLIFICATION IN MRAM DURING READING
- Publication number 20220293156
- Publication date Sep 15, 2022
- SANDISK TECHNOLOGIES LLC
- Ward Parkinson
- G11 - INFORMATION STORAGE
Information Patent Application
CONCURRENT MULTI-BIT ACCESS IN CROSS-POINT ARRAY
- Publication number 20220157376
- Publication date May 19, 2022
- SANDISK TECHNOLOGIES LLC
- Nathan Franklin
- G11 - INFORMATION STORAGE
Information Patent Application
POWER OFF RECOVERY IN CROSS-POINT MEMORY WITH THRESHOLD SWITCHING S...
- Publication number 20220139454
- Publication date May 5, 2022
- SANDISK TECHNOLOGIES LLC
- Neil Robertson
- G11 - INFORMATION STORAGE
Information Patent Application
SIGNAL PRESERVE IN MRAM DURING READING
- Publication number 20220108739
- Publication date Apr 7, 2022
- SANDISK TECHNOLOGIES LLC
- Ward Parkinson
- G11 - INFORMATION STORAGE
Information Patent Application
SIGNAL AMPLIFICATION IN MRAM DURING READING
- Publication number 20220108740
- Publication date Apr 7, 2022
- SANDISK TECHNOLOGIES LLC
- Ward Parkinson
- G11 - INFORMATION STORAGE
Information Patent Application
CROSSPOINT MEMORY ARCHITECTURE FOR HIGH BANDWIDTH OPERATION WITH SM...
- Publication number 20210181979
- Publication date Jun 17, 2021
- SANDISK TECHNOLOGIES LLC
- Won Ho Choi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PHASE CHANGE MEMORY DEVICE WITH REDUCED READ DISTURB AND METHOD OF...
- Publication number 20200005863
- Publication date Jan 2, 2020
- SANDISK TECHNOLOGIES LLC
- Michael GROBIS
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTANCE AND GATE CONTROL IN DECODER CIRCUITS FOR READ AND WRITE...
- Publication number 20190267082
- Publication date Aug 29, 2019
- SanDisk Technologies LLC
- Ward Parkinson
- G11 - INFORMATION STORAGE
Information Patent Application
DATA REWRITE DURING REFRESH WINDOW
- Publication number 20190221273
- Publication date Jul 18, 2019
- SANDISK TECHNOLOGIES LLC
- Ward PARKINSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WRITE SET OPERATION FOR MEMORY DEVICE WITH BIT LINE CAPACITOR DRIVE
- Publication number 20190198106
- Publication date Jun 27, 2019
- SanDisk Technologies LLC
- Ward Parkinson
- G11 - INFORMATION STORAGE
Information Patent Application
CROSS-POINT MEMORY ARRAY ADDRESSING
- Publication number 20180301188
- Publication date Oct 18, 2018
- SanDisk Technologies LLC
- WON HO CHOI
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY MAINTENANCE OPERATIONS DURING REFRESH WINDOW
- Publication number 20180285007
- Publication date Oct 4, 2018
- SanDisk Technologies LLC
- NATHAN FRANKLIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BI-DIRECTIONAL RRAM DECODER-DRIVER
- Publication number 20180137915
- Publication date May 17, 2018
- Western Digital Technologies, Inc.
- James Edwin O'TOOLE
- G11 - INFORMATION STORAGE
Information Patent Application
OTS FOR NVM ARRAY SELECT LINES
- Publication number 20170372779
- Publication date Dec 28, 2017
- HGST NETHERLANDS B.V.
- James Edwin O'TOOLE
- G11 - INFORMATION STORAGE
Information Patent Application
BI-DIRECTIONAL RRAM DECODER-DRIVER
- Publication number 20170372781
- Publication date Dec 28, 2017
- HGST NETHERLANDS B.V.
- James Edwin O'TOOLE
- G11 - INFORMATION STORAGE
Information Patent Application
Method and Apparatus for Decoding Memory
- Publication number 20160276024
- Publication date Sep 22, 2016
- Ward Parkinson
- G11 - INFORMATION STORAGE
Information Patent Application
NMOS REGULATED VOLTAGE REFERENCE
- Publication number 20160124456
- Publication date May 5, 2016
- HGST, Inc.
- R. Jacob Baker
- G05 - CONTROLLING REGULATING

Ward M. Parkinson

Person

Patents Grantslast 30 patents

Concurrent multi-bit self-referenced read of programmable resistanc...

Concurrent write to programmable resistance memory cells in cross-p...

Cross-point array IHOLD read margin improvement

Mixed current-forced read scheme for MRAM array with selector

Current mirror circuits

Programmable ECC for MRAM mixed-read scheme

Cross-point array refresh scheme

Signal amplification in MRAM during reading, including a pair of co...

Power off recovery in cross-point memory with threshold switching s...

Forced current access with voltage clamping in cross-point array

Forced current access with voltage clamping in cross-point array

Power off recovery in cross-point memory with threshold switching s...

Concurrent multi-bit access in cross-point array

Forced current access with voltage clamping in cross-point array

Signal amplification in MRAM during reading, including a pair of co...

Signal preserve in MRAM during reading

MRAM cross-point memory with reversed MRAM element vertical orienta...

Crosspoint memory architecture for high bandwidth operation with sm...

Data rewrite during refresh window

Phase change memory device with reduced read disturb and method of...

Memory maintenance operations during refresh window

Cross-point memory array addressing

Resistance and gate control in decoder circuits for read and write...

Write set operation for memory device with bit line capacitor drive

Multiple-mode current sources for sense operations

Bi-directional RRAM decoder-driver

Ovonic threshold switch (OTS) driver/selector uses unselect bias to...

Bi-directional RRAM decoder-driver

NMOS regulated voltage reference

Method and apparatus for decoding memory

Patents Applicationslast 30 patents

CURRENT SOURCE FOR READ OF PROGRAMMABLE RESISTANCE MEMORY CELLS

CROSS-POINT ARRAY REFRESH SCHEME

FAST SELF-REFERENCED READ OF PROGRAMMABLE RESISTANCE MEMORY CELLS

CROSS-POINT ARRAY REFRESH SCHEME

CROSS-POINT ARRAY IHOLD READ MARGIN IMPROVEMENT

CURRENT MIRROR CIRCUITS

PROGRAMMABLE ECC FOR MRAM MIXED-READ SCHEME

MIXED CURRENT-FORCED READ SCHEME FOR RERAM ARRAY WITH SELECTOR

POWER OFF RECOVERY IN CROSS-POINT MEMORY WITH THRESHOLD SWITCHING S...

CONCURRENT MULTI-BIT ACCESS IN CROSS-POINT ARRAY

CONCURRENT MULTI-BIT ACCESS IN CROSS-POINT ARRAY

FORCED CURRENT ACCESS WITH VOLTAGE CLAMPING IN CROSS-POINT ARRAY

FORCED CURRENT ACCESS WITH VOLTAGE CLAMPING IN CROSS-POINT ARRAY

SIGNAL AMPLIFICATION IN MRAM DURING READING

CONCURRENT MULTI-BIT ACCESS IN CROSS-POINT ARRAY

POWER OFF RECOVERY IN CROSS-POINT MEMORY WITH THRESHOLD SWITCHING S...

SIGNAL PRESERVE IN MRAM DURING READING

SIGNAL AMPLIFICATION IN MRAM DURING READING

CROSSPOINT MEMORY ARCHITECTURE FOR HIGH BANDWIDTH OPERATION WITH SM...

PHASE CHANGE MEMORY DEVICE WITH REDUCED READ DISTURB AND METHOD OF...

RESISTANCE AND GATE CONTROL IN DECODER CIRCUITS FOR READ AND WRITE...

DATA REWRITE DURING REFRESH WINDOW

WRITE SET OPERATION FOR MEMORY DEVICE WITH BIT LINE CAPACITOR DRIVE

CROSS-POINT MEMORY ARRAY ADDRESSING

MEMORY MAINTENANCE OPERATIONS DURING REFRESH WINDOW

BI-DIRECTIONAL RRAM DECODER-DRIVER

OTS FOR NVM ARRAY SELECT LINES

BI-DIRECTIONAL RRAM DECODER-DRIVER

Method and Apparatus for Decoding Memory

NMOS REGULATED VOLTAGE REFERENCE