Wayne A. Michaelson

Person

Lake Elmo, MN, US

People

Patents Grantslast 30 patents

Information Patent Grant
Bus request error detection
- Patent number 5,649,096
- Issue date Jul 15, 1997
- Unisys Corporation
- Joseba Mirena Desubijana
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple memory bit/chip failure detection
- Patent number 5,612,965
- Issue date Mar 18, 1997
- Unisys Corporation
- Wayne A. Michaelson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for storing partial blocks of file data in a file...
- Patent number 5,555,391
- Issue date Sep 10, 1996
- Unisys Corporation
- Joseba M. De Subijana
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for processing external conditional branch instru...
- Patent number 5,539,888
- Issue date Jul 23, 1996
- Unisys Corporation
- Larry L. Byers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microsequencer bus controller system
- Patent number 5,535,405
- Issue date Jul 9, 1996
- Unisys Corporation
- Larry L. Byers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor communications bus having address lines selecting differe...
- Patent number 5,519,876
- Issue date May 21, 1996
- Unisys Corporation
- Larry L. Byers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple width data bus for a microsequencer bus controller system
- Patent number 5,515,507
- Issue date May 7, 1996
- Unisys Corporation
- Larry L. Byers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Stuck fault detection for branch instruction condition signals
- Patent number 5,495,598
- Issue date Feb 27, 1996
- Unisys Corporation
- Larry L. Byers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data block check sequence generation and validation in a file cache...
- Patent number 5,488,702
- Issue date Jan 30, 1996
- Unisys Corporation
- Larry L. Byers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for processing shift, mask, and merge operations in one inst...
- Patent number 5,487,159
- Issue date Jan 23, 1996
- Unisys Corporation
- Larry L. Byers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for executing branch instructions wherein branch...
- Patent number 5,471,597
- Issue date Nov 28, 1995
- Unisys Corporation
- Larry L. Byers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address verification system using parity for transmitting and recei...
- Patent number 5,453,999
- Issue date Sep 26, 1995
- Unisys Corporation
- Wayne A. Michaelson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Counter malfunction detection using prior, current and predicted pa...
- Patent number 5,440,604
- Issue date Aug 8, 1995
- Unisys Corporation
- Joseba M. De Subijana
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus station abort detection
- Patent number 5,423,030
- Issue date Jun 6, 1995
- Unisys Corporation
- Larry L. Byers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data bank priority system
- Patent number 5,257,382
- Issue date Oct 26, 1993
- Unisys Corporation
- Larry L. Byers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory access system for pipelined data paths to and from storage
- Patent number 5,060,145
- Issue date Oct 22, 1991
- Unisys Corporation
- James H. Scheuneman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data bank priority system
- Patent number 5,032,984
- Issue date Jul 16, 1991
- Unisys Corporation
- Larry L. Byers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data bus enable verification logic
- Patent number 4,953,167
- Issue date Aug 28, 1990
- Unisys Corporation
- Larry L. Byers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Activity verification system for memory or logic
- Patent number 4,947,393
- Issue date Aug 7, 1990
- Unisys Corporation
- Richard F. Paul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fault detection in memory refreshing system
- Patent number 4,933,908
- Issue date Jun 12, 1990
- Unisys Corporation
- Larry L. Byers
- G11 - INFORMATION STORAGE
Information Patent Grant
Bifurcated register priority system
- Patent number 4,926,313
- Issue date May 15, 1990
- Unisys Corporation
- Larry L. Byers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-performance pipelined stack with over-write protection
- Patent number 4,674,032
- Issue date Jun 16, 1987
- Unisys Corporation
- Wayne A. Michaelson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipelined split stack with high performance interleaved decode
- Patent number 4,600,986
- Issue date Jul 15, 1986
- Sperry Corporation
- James H. Scheuneman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Forced clear of a memory time-out to a maintenance exerciser
- Patent number 4,590,586
- Issue date May 20, 1986
- Sperry Corporation
- Daniel K. Zenk
- G06 - COMPUTING CALCULATING COUNTING

Wayne A. Michaelson

Person

Patents Grantslast 30 patents

Bus request error detection

Multiple memory bit/chip failure detection

System and method for storing partial blocks of file data in a file...

System and method for processing external conditional branch instru...

Microsequencer bus controller system

Processor communications bus having address lines selecting differe...

Multiple width data bus for a microsequencer bus controller system

Stuck fault detection for branch instruction condition signals

Data block check sequence generation and validation in a file cache...

System for processing shift, mask, and merge operations in one inst...

System and method for executing branch instructions wherein branch...

Address verification system using parity for transmitting and recei...

Counter malfunction detection using prior, current and predicted pa...

Bus station abort detection

Data bank priority system

Memory access system for pipelined data paths to and from storage

Data bank priority system

Data bus enable verification logic

Activity verification system for memory or logic

Fault detection in memory refreshing system

Bifurcated register priority system

High-performance pipelined stack with over-write protection

Pipelined split stack with high performance interleaved decode

Forced clear of a memory time-out to a maintenance exerciser