Wayne F. Ellis

Person

Jericho Center, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Timing-drift calibration
- Patent number 12,094,553
- Issue date Sep 17, 2024
- RAMBUS INC.
- Yohan U. Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Protocol for memory power-mode control
- Patent number 11,948,619
- Issue date Apr 2, 2024
- RAMBUS INC.
- Wayne F. Ellis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-element memory device with power control for individual elements
- Patent number 11,940,857
- Issue date Mar 26, 2024
- RAMBUS INC.
- Deborah Lindsey Dressler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
2T-1R architecture for resistive ram
- Patent number 11,908,515
- Issue date Feb 20, 2024
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Protocol for memory power-mode control
- Patent number 11,621,030
- Issue date Apr 4, 2023
- RAMBUS INC.
- Wayne F. Ellis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
2T-1R architecture for resistive RAM
- Patent number 11,568,929
- Issue date Jan 31, 2023
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-element memory device with power control for individual elements
- Patent number 11,531,386
- Issue date Dec 20, 2022
- RAMBUS INC.
- Deborah Lindsey Dressler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Protocol for memory power-mode control
- Patent number 11,250,901
- Issue date Feb 15, 2022
- RAMBUS INC.
- Wayne F. Ellis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Timing-drift calibration
- Patent number 11,211,139
- Issue date Dec 28, 2021
- RAMBUS INC.
- Yohan U. Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
1T-1R architecture for resistive random access memory
- Patent number 11,152,062
- Issue date Oct 19, 2021
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
2T-1R architecture for resistive RAM
- Patent number 11,081,176
- Issue date Aug 3, 2021
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Protocol for memory power-mode control
- Patent number 10,878,878
- Issue date Dec 29, 2020
- RAMBUS INC.
- Wayne F. Ellis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
1T-1R architecture for resistive random access memory
- Patent number 10,783,964
- Issue date Sep 22, 2020
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-element memory device with power control for individual elements
- Patent number 10,698,464
- Issue date Jun 30, 2020
- Rambus Inc.
- Deborah Lindsey Dressler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Protocol for memory power-mode control
- Patent number 10,672,450
- Issue date Jun 2, 2020
- Rambus Inc.
- Wayne F. Ellis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Protocol for memory power-mode control
- Patent number 10,622,053
- Issue date Apr 14, 2020
- Rambus Inc.
- Wayne F. Ellis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
2T-1R architecture for resistive ram
- Patent number 10,622,062
- Issue date Apr 14, 2020
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Protocol for memory power-mode control
- Patent number 10,614,869
- Issue date Apr 7, 2020
- Rambus Inc.
- Wayne F. Ellis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Timing-drift calibration
- Patent number 10,600,497
- Issue date Mar 24, 2020
- Rambus Inc.
- Yohan U. Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Protocol for memory power-mode control
- Patent number 10,431,290
- Issue date Oct 1, 2019
- Rambus Inc.
- Wayne F. Ellis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
1T-1R architecture for resistive random access memory
- Patent number 10,388,372
- Issue date Aug 20, 2019
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
DRAM having a plurality of registers
- Patent number 10,262,718
- Issue date Apr 16, 2019
- Rambus Inc.
- Wayne F. Ellis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Communication via a memory interface
- Patent number 10,209,922
- Issue date Feb 19, 2019
- Rambus Inc.
- Liji Gopalakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
2T-1R architecture for resistive RAM
- Patent number 10,199,098
- Issue date Feb 5, 2019
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with in-system repair capability
- Patent number 10,198,314
- Issue date Feb 5, 2019
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory control component with dynamic command/address signaling rate
- Patent number 10,170,170
- Issue date Jan 1, 2019
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
2T-1R architecture for resistive RAM
- Patent number 10,037,801
- Issue date Jul 31, 2018
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-element memory device with power control for individual elements
- Patent number 9,965,012
- Issue date May 8, 2018
- Rambus Inc.
- Deborah Lindsey Dressler
- G11 - INFORMATION STORAGE
Information Patent Grant
Protocol for memory power-mode control
- Patent number 9,886,993
- Issue date Feb 6, 2018
- Rambus Inc.
- Wayne F. Ellis
- G11 - INFORMATION STORAGE
Information Patent Grant
Timing-drift calibration
- Patent number 9,859,021
- Issue date Jan 2, 2018
- Rambus Inc.
- Yohan U. Frans
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Multi-Element Memory Device with Power for Individual Elements
- Publication number 20240288922
- Publication date Aug 29, 2024
- Rambus Inc.
- Deborah Lindsey Dressler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROTOCOL FOR MEMORY POWER-MODE CONTROL
- Publication number 20240282354
- Publication date Aug 22, 2024
- Rambus Inc.
- Wayne F. Ellis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Element Memory Device with Power Control for Individual Elements
- Publication number 20230297151
- Publication date Sep 21, 2023
- Rambus Inc.
- Deborah Lindsey Dressler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROTOCOL FOR MEMORY POWER-MODE CONTROL
- Publication number 20230282266
- Publication date Sep 7, 2023
- Rambus Inc.
- Wayne F. Ellis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
2T-1R ARCHITECTURE FOR RESISTIVE RAM
- Publication number 20230154531
- Publication date May 18, 2023
- Hefei Reliance Memory Limited
- Deepak Chandra SEKAR
- G11 - INFORMATION STORAGE
Information Patent Application
PROTOCOL FOR MEMORY POWER-MODE CONTROL
- Publication number 20220254407
- Publication date Aug 11, 2022
- Rambus Inc.
- Wayne F. Ellis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TIMING-DRIFT CALIBRATION
- Publication number 20220223224
- Publication date Jul 14, 2022
- Rambus Inc.
- Yohan U. Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
2T-1R ARCHITECTURE FOR RESISTIVE RAM
- Publication number 20210295913
- Publication date Sep 23, 2021
- Hefei Reliance Memory Limited
- Deepak Chandra SEKAR
- G11 - INFORMATION STORAGE
Information Patent Application
PROTOCOL FOR MEMORY POWER-MODE CONTROL
- Publication number 20210174865
- Publication date Jun 10, 2021
- Rambus Inc.
- Wayne F. Ellis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Element Memory Device with Power Control for Individual Elements
- Publication number 20210072810
- Publication date Mar 11, 2021
- Rambus Inc.
- Deborah Lindsey Dressler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
1T-1R ARCHITECTURE FOR RESISTIVE RANDOM ACCESS MEMORY
- Publication number 20200395068
- Publication date Dec 17, 2020
- Hefei Reliance Memory Limited
- Deepak Chandra SEKAR
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CONTROL COMPONENT WITH INTER-RANK SKEW TOLERANCE
- Publication number 20200349991
- Publication date Nov 5, 2020
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TIMING-DRIFT CALIBRATION
- Publication number 20200312422
- Publication date Oct 1, 2020
- RAMBUS INC.
- Yohan U. Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROTOCOL FOR MEMORY POWER-MODE CONTROL
- Publication number 20200294577
- Publication date Sep 17, 2020
- RAMBUS INC.
- Wayne F. Ellis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
2T-1R ARCHITECTURE FOR RESISTIVE RAM
- Publication number 20200211644
- Publication date Jul 2, 2020
- Hefei Reliance Memory Limited
- Deepak Chandra SEKAR
- G11 - INFORMATION STORAGE
Information Patent Application
1T-1R ARCHITECTURE FOR RESISTIVE RANDOM ACCESS MEMORY
- Publication number 20190355414
- Publication date Nov 21, 2019
- Hefei Reliance Memory Limited
- Deepak Chandra SEKAR
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CONTROL COMPONENT WITH INTER-RANK SKEW TOLERANCE
- Publication number 20190180805
- Publication date Jun 13, 2019
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROTOCOL FOR MEMORY POWER-MODE CONTROL
- Publication number 20190180813
- Publication date Jun 13, 2019
- RAMBUS INC.
- Wayne F. Ellis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
2T-1R ARCHITECTURE FOR RESISTIVE RAM
- Publication number 20190156886
- Publication date May 23, 2019
- Hefei Reliance Memory Limited
- Deepak Chandra SEKAR
- G11 - INFORMATION STORAGE
Information Patent Application
PROTOCOL FOR MEMORY POWER-MODE CONTROL
- Publication number 20190139598
- Publication date May 9, 2019
- RAMBUS INC.
- Wayne F. Ellis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROTOCOL FOR MEMORY POWER-MODE CONTROL
- Publication number 20190027210
- Publication date Jan 24, 2019
- RAMBUS INC.
- Wayne F. Ellis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Element Memory Device with Power Control for Individual Elements
- Publication number 20180329467
- Publication date Nov 15, 2018
- RAMBUS INC.
- Deborah Lindsey Dressler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
2T-1R ARCHITECTURE FOR RESISTIVE RAM
- Publication number 20180330782
- Publication date Nov 15, 2018
- Hefei Reliance Memory Limited
- Deepak Chandra SEKAR
- G11 - INFORMATION STORAGE
Information Patent Application
PROTOCOL FOR MEMORY POWER-MODE CONTROL
- Publication number 20180226120
- Publication date Aug 9, 2018
- RAMBUS INC.
- Wayne F. Ellis
- G11 - INFORMATION STORAGE
Information Patent Application
TIMING-DRIFT CALIBRATION
- Publication number 20180174667
- Publication date Jun 21, 2018
- RAMBUS INC.
- Yohan U. Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
1T-1R ARCHITECTURE FOR RESISTIVE RANDOM ACCESS MEMORY
- Publication number 20180137914
- Publication date May 17, 2018
- RAMBUS INC.
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CONTROL COMPONENT WITH DYNAMIC COMMAND/ADDRESS SIGNALING RATE
- Publication number 20180122444
- Publication date May 3, 2018
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH CAPACITY MEMORY SYSTEMS
- Publication number 20170133070
- Publication date May 11, 2017
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROTOCOL FOR MEMORY POWER-MODE CONTROL
- Publication number 20170103802
- Publication date Apr 13, 2017
- RAMBUS INC.
- Wayne F. Ellis
- G11 - INFORMATION STORAGE
Information Patent Application
1T-1R ARCHITECTURE FOR RESISTIVE RANDOM ACCESS MEMORY
- Publication number 20170004879
- Publication date Jan 5, 2017
- RAMBUS INC.
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE

Wayne F. Ellis

Person

Patents Grantslast 30 patents

Timing-drift calibration

Protocol for memory power-mode control

Multi-element memory device with power control for individual elements

2T-1R architecture for resistive ram

Protocol for memory power-mode control

2T-1R architecture for resistive RAM

Multi-element memory device with power control for individual elements

Protocol for memory power-mode control

Timing-drift calibration

1T-1R architecture for resistive random access memory

2T-1R architecture for resistive RAM

Protocol for memory power-mode control

1T-1R architecture for resistive random access memory

Multi-element memory device with power control for individual elements

Protocol for memory power-mode control

Protocol for memory power-mode control

2T-1R architecture for resistive ram

Protocol for memory power-mode control

Timing-drift calibration

Protocol for memory power-mode control

1T-1R architecture for resistive random access memory

DRAM having a plurality of registers

Communication via a memory interface

2T-1R architecture for resistive RAM

Memory device with in-system repair capability

Memory control component with dynamic command/address signaling rate

2T-1R architecture for resistive RAM

Multi-element memory device with power control for individual elements

Protocol for memory power-mode control

Timing-drift calibration

Patents Applicationslast 30 patents

Multi-Element Memory Device with Power for Individual Elements

PROTOCOL FOR MEMORY POWER-MODE CONTROL

Multi-Element Memory Device with Power Control for Individual Elements

PROTOCOL FOR MEMORY POWER-MODE CONTROL

2T-1R ARCHITECTURE FOR RESISTIVE RAM

PROTOCOL FOR MEMORY POWER-MODE CONTROL

TIMING-DRIFT CALIBRATION

2T-1R ARCHITECTURE FOR RESISTIVE RAM

PROTOCOL FOR MEMORY POWER-MODE CONTROL

Multi-Element Memory Device with Power Control for Individual Elements

1T-1R ARCHITECTURE FOR RESISTIVE RANDOM ACCESS MEMORY

MEMORY CONTROL COMPONENT WITH INTER-RANK SKEW TOLERANCE

TIMING-DRIFT CALIBRATION

PROTOCOL FOR MEMORY POWER-MODE CONTROL

2T-1R ARCHITECTURE FOR RESISTIVE RAM

1T-1R ARCHITECTURE FOR RESISTIVE RANDOM ACCESS MEMORY

MEMORY CONTROL COMPONENT WITH INTER-RANK SKEW TOLERANCE

PROTOCOL FOR MEMORY POWER-MODE CONTROL

2T-1R ARCHITECTURE FOR RESISTIVE RAM

PROTOCOL FOR MEMORY POWER-MODE CONTROL

PROTOCOL FOR MEMORY POWER-MODE CONTROL

Multi-Element Memory Device with Power Control for Individual Elements

2T-1R ARCHITECTURE FOR RESISTIVE RAM

PROTOCOL FOR MEMORY POWER-MODE CONTROL

TIMING-DRIFT CALIBRATION

1T-1R ARCHITECTURE FOR RESISTIVE RANDOM ACCESS MEMORY

MEMORY CONTROL COMPONENT WITH DYNAMIC COMMAND/ADDRESS SIGNALING RATE

HIGH CAPACITY MEMORY SYSTEMS

PROTOCOL FOR MEMORY POWER-MODE CONTROL

1T-1R ARCHITECTURE FOR RESISTIVE RANDOM ACCESS MEMORY