Wayne W. Wong

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Delay locked loop for an FPGA architecture
- Patent number 7,941,685
- Issue date May 10, 2011
- Actel Corporation
- William C. Plants
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Encryption for a stream file in an FPGA integrated circuit
- Patent number 7,558,967
- Issue date Jul 7, 2009
- Actel Corporation
- Wayne Wong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel programmable antifuse field programmable gate array device...
- Patent number 7,549,138
- Issue date Jun 16, 2009
- Actel Corporation
- Shin-Nan Sun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Delay locked loop for an FPGA architecture
- Patent number 7,484,113
- Issue date Jan 27, 2009
- Actel Corporation
- William C. Plants
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel programmable antifuse field programmable gate array device...
- Patent number 7,269,814
- Issue date Sep 11, 2007
- Actel Corporation
- Shin-Nan Sun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Delay locked loop for and FPGA architecture
- Patent number 7,171,575
- Issue date Jan 30, 2007
- Actel Corporation
- William C. Plants
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel programmable antifuse field programmable gate array device...
- Patent number 7,111,272
- Issue date Sep 19, 2006
- Actel Corporation
- Shin-Nan Sun
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Delay locked loop for an FPGA architecture
- Patent number 6,976,185
- Issue date Dec 13, 2005
- Actel Corporation
- William C. Plants
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel programmable antifuse field programmable gate array device...
- Patent number 6,885,218
- Issue date Apr 26, 2005
- Actel Corporation
- Shin-Nan Sun
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Delay locked loop for an FPGA architecture
- Patent number 6,718,477
- Issue date Apr 6, 2004
- William C. Plants
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DELAY LOCKED LOOP FOR AN FPGA ARCHITECTURE
- Publication number 20090094475
- Publication date Apr 9, 2009
- Actel Corporation
- William C. Plants
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL PROGRAMMABLE ANTIFUSE FIELD PROGRAMMABLE GATE ARRAY DEVICE...
- Publication number 20080028354
- Publication date Jan 31, 2008
- Actel Corporation
- Shin-Nan Sun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Encryption for a stream file in an FPGA integrated circuit
- Publication number 20030163715
- Publication date Aug 28, 2003
- Actel Corporation
- Wayne Wong
- G06 - COMPUTING CALCULATING COUNTING

Wayne W. Wong

Person

Patents Grantslast 30 patents

Delay locked loop for an FPGA architecture

Encryption for a stream file in an FPGA integrated circuit

Parallel programmable antifuse field programmable gate array device...

Delay locked loop for an FPGA architecture

Parallel programmable antifuse field programmable gate array device...

Delay locked loop for and FPGA architecture

Parallel programmable antifuse field programmable gate array device...

Delay locked loop for an FPGA architecture

Parallel programmable antifuse field programmable gate array device...

Delay locked loop for an FPGA architecture

Patents Applicationslast 30 patents

DELAY LOCKED LOOP FOR AN FPGA ARCHITECTURE

PARALLEL PROGRAMMABLE ANTIFUSE FIELD PROGRAMMABLE GATE ARRAY DEVICE...

Encryption for a stream file in an FPGA integrated circuit