Wei-E Wang

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method of forming multiple-Vt FETS for CMOS circuit applications
- Patent number 11,749,739
- Issue date Sep 5, 2023
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a thermal shield in a monolithic 3-d integrated c...
- Patent number 11,605,574
- Issue date Mar 14, 2023
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming multi-threshold voltage devices and devices so fo...
- Patent number 11,476,121
- Issue date Oct 18, 2022
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device including a repeater/buffer at upper metal rou...
- Patent number 11,404,405
- Issue date Aug 2, 2022
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming sacrificial self-aligned features for assisting d...
- Patent number 11,189,600
- Issue date Nov 30, 2021
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming isolation dielectrics for stacked field effect tr...
- Patent number 11,158,738
- Issue date Oct 26, 2021
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming multiple-Vt FETs for CMOS circuit applications
- Patent number 11,088,258
- Issue date Aug 10, 2021
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal oxide semiconductor field effect transistor with crystalline...
- Patent number 11,081,590
- Issue date Aug 3, 2021
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming multi-threshold voltage devices using dipole-high...
- Patent number 11,069,576
- Issue date Jul 20, 2021
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a thermal shield in a monolithic 3-D integrated c...
- Patent number 10,971,420
- Issue date Apr 6, 2021
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device including a repeater/buffer at upper metal rou...
- Patent number 10,854,591
- Issue date Dec 1, 2020
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming multi-threshold voltage devices using dipole-high...
- Patent number 10,770,353
- Issue date Sep 8, 2020
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Complimentary metal-oxide-semiconductor circuit having transistors...
- Patent number 10,727,297
- Issue date Jul 28, 2020
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of providing source and drain doping for CMOS architecture i...
- Patent number 10,586,738
- Issue date Mar 10, 2020
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming crystalline oxides on III-V materials
- Patent number 10,475,930
- Issue date Nov 12, 2019
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming multi-threshold voltage devices and devices so fo...
- Patent number 10,446,400
- Issue date Oct 15, 2019
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Horizontal nanosheet FETs and method of manufacturing the same
- Patent number 10,026,652
- Issue date Jul 17, 2018
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device including a repeater/buffer at higher metal ro...
- Patent number 10,026,751
- Issue date Jul 17, 2018
- Samsung Electronics Co., Ltd.
- Titash Rakshit
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nanosheet and nanowire devices having source/drain stressors and me...
- Patent number 9,941,405
- Issue date Apr 10, 2018
- Samsung Electronics Co., Ltd.
- Jorge A. Kittl
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming internal dielectric spacers for horizontal nanosh...
- Patent number 9,905,672
- Issue date Feb 27, 2018
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming nanosheets on lattice mismatched substrates
- Patent number 9,870,940
- Issue date Jan 16, 2018
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-VT gate stack for III-V nanosheet devices with reduced parasi...
- Patent number 9,812,449
- Issue date Nov 7, 2017
- Samsung Electronics Co., Ltd.
- Borna J. Obradovic
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-layer fin field effect transistor devices and methods of form...
- Patent number 9,793,403
- Issue date Oct 17, 2017
- Samsung Electronics Co., Ltd.
- Borna J. Obradovic
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Relaxed semiconductor layers with reduced defects and methods of fo...
- Patent number 9,773,906
- Issue date Sep 26, 2017
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interface layer for gate stack using O3 post treatment
- Patent number 9,698,234
- Issue date Jul 4, 2017
- Samsung Electronics Co., Ltd.
- Jorge A. Kittl
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming defect-free SRB onto lattice-mismatched substrat...
- Patent number 9,691,860
- Issue date Jun 27, 2017
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming low-defect strain-relaxed layers on lattice-mism...
- Patent number 9,343,303
- Issue date May 17, 2016
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming semiconductor patterns including reduced disloca...
- Patent number 9,064,699
- Issue date Jun 23, 2015
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD OF FORMING MULTIPLE-VT FETS FOR CMOS CIRCUIT APPLICATIONS
- Publication number 20230361194
- Publication date Nov 9, 2023
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING MULTIPLE-VT FETS FOR CMOS CIRCUIT APPLICATIONS
- Publication number 20210376109
- Publication date Dec 2, 2021
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A THERMAL SHIELD IN A MONOLITHIC 3-D INTEGRATED C...
- Publication number 20210183729
- Publication date Jun 17, 2021
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING SACRIFICIAL SELF-ALIGNED FEATURES FOR ASSISTING D...
- Publication number 20210183814
- Publication date Jun 17, 2021
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING ISOLATION DIELECTRICS FOR STACKED FIELD EFFECT TR...
- Publication number 20200403097
- Publication date Dec 24, 2020
- Samsung Electronics Co., Ltd.
- Wei-E WANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING A REPEATER/BUFFER AT UPPER METAL ROU...
- Publication number 20200381414
- Publication date Dec 3, 2020
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING MULTI-THRESHOLD VOLTAGE DEVICES USING DIPOLE-HIGH...
- Publication number 20200357700
- Publication date Nov 12, 2020
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A THERMAL SHIELD IN A MONOLITHIC 3-D INTEGRATED C...
- Publication number 20200203247
- Publication date Jun 25, 2020
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING MULTIPLE-VT FETS FOR CMOS CIRCUIT APPLICATIONS
- Publication number 20200194569
- Publication date Jun 18, 2020
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING CRYSTALLINE OXIDES ON III-V MATERIALS
- Publication number 20200035838
- Publication date Jan 30, 2020
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING MULTI-THRESHOLD VOLTAGE DEVICES AND DEVICES SO FO...
- Publication number 20190385856
- Publication date Dec 19, 2019
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING MULTI-THRESHOLD VOLTAGE DEVICES USING DIPOLE-HIGH...
- Publication number 20190148237
- Publication date May 16, 2019
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF PROVIDING SOURCE AND DRAIN DOPING FOR CMOS ARCHITECTURE I...
- Publication number 20190131182
- Publication date May 2, 2019
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING MULTI-THRESHOLD VOLTAGE DEVICES AND DEVICES SO FO...
- Publication number 20190122891
- Publication date Apr 25, 2019
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING A REPEATER/BUFFER AT UPPER METAL ROU...
- Publication number 20180130785
- Publication date May 10, 2018
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COMPLIMENTARY METAL-OXIDE-SEMICONDUCTOR CIRCUIT HAVING TRANSISTORS...
- Publication number 20180076199
- Publication date Mar 15, 2018
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING CRYSTALLINE OXIDES ON III-V MATERIALS
- Publication number 20180053859
- Publication date Feb 22, 2018
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HORIZONTAL NANOSHEET FETS AND METHOD OF MANUFACTURING THE SAME
- Publication number 20180053690
- Publication date Feb 22, 2018
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING INTERNAL DIELECTRIC SPACERS FOR HORIZONTAL NANOSH...
- Publication number 20170338328
- Publication date Nov 23, 2017
- Samsung Electronics Co., Ltd.
- Wei-E WANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NANOSHEET AND NANOWIRE DEVICES HAVING SOURCE/DRAIN STRESSORS AND ME...
- Publication number 20170271514
- Publication date Sep 21, 2017
- Samsung Electronics Co., Ltd.
- Jorge A. Kittl
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-VT GATE STACK FOR III-V NANOSHEET DEVICES WITH REDUCED PARASI...
- Publication number 20170148787
- Publication date May 25, 2017
- Samsung Electronics Co., Ltd.
- Borna J. Obradovic
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING A REPEATER/BUFFER AT HIGHER METAL RO...
- Publication number 20170098661
- Publication date Apr 6, 2017
- Samsung Electronics Co., Ltd.
- Titash Rakshit
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of Forming Nanosheets on Lattice Mismatched Substrates
- Publication number 20170040209
- Publication date Feb 9, 2017
- Samsung Electronics Co., Ltd.
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Relaxed Semiconductor Layers With Reduced Defects and Methods of Fo...
- Publication number 20160322493
- Publication date Nov 3, 2016
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-LAYER FIN FIELD EFFECT TRANSISTOR DEVICES AND METHODS OF FORM...
- Publication number 20160308055
- Publication date Oct 20, 2016
- BORNA J. OBRADOVIC
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RECTANGULAR NANOSHEET FABRICATION
- Publication number 20160071729
- Publication date Mar 10, 2016
- Samsung Electronics Co., Ltd.
- Ryan M. Hatcher
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERFACE LAYER FOR GATE STACK USING 03 POST TREATMENT
- Publication number 20160042956
- Publication date Feb 11, 2016
- Samsung Electronics Co., Ltd.
- Jorge A. Kittl
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING DEFECT-FREE SRB ONTO LATTICE-MISMATCHED SUBSTRAT...
- Publication number 20150318355
- Publication date Nov 5, 2015
- Samsung Electronics Co., Ltd.
- Wei-E WANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING LOW-DEFECT STRAIN-RELAXED LAYERS ON LATTICE-MISM...
- Publication number 20150270120
- Publication date Sep 24, 2015
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING SEMICONDUCTOR PATTERNS INCLUDING REDUCED DISLOCA...
- Publication number 20150093884
- Publication date Apr 2, 2015
- Wei-E Wang
- H01 - BASIC ELECTRIC ELEMENTS

Person

Patents Grantslast 30 patents

Method of forming multiple-Vt FETS for CMOS circuit applications

Method of forming a thermal shield in a monolithic 3-d integrated c...

Method of forming multi-threshold voltage devices and devices so fo...

Semiconductor device including a repeater/buffer at upper metal rou...

Method of forming sacrificial self-aligned features for assisting d...

Method of forming isolation dielectrics for stacked field effect tr...

Method of forming multiple-Vt FETs for CMOS circuit applications

Metal oxide semiconductor field effect transistor with crystalline...

Method of forming multi-threshold voltage devices using dipole-high...

Method of forming a thermal shield in a monolithic 3-D integrated c...

Semiconductor device including a repeater/buffer at upper metal rou...

Method of forming multi-threshold voltage devices using dipole-high...

Complimentary metal-oxide-semiconductor circuit having transistors...

Method of providing source and drain doping for CMOS architecture i...

Method of forming crystalline oxides on III-V materials

Method of forming multi-threshold voltage devices and devices so fo...

Horizontal nanosheet FETs and method of manufacturing the same

Semiconductor device including a repeater/buffer at higher metal ro...

Nanosheet and nanowire devices having source/drain stressors and me...

Method of forming internal dielectric spacers for horizontal nanosh...

Methods of forming nanosheets on lattice mismatched substrates

Multi-VT gate stack for III-V nanosheet devices with reduced parasi...

Multi-layer fin field effect transistor devices and methods of form...

Relaxed semiconductor layers with reduced defects and methods of fo...

Interface layer for gate stack using O3 post treatment

Methods of forming defect-free SRB onto lattice-mismatched substrat...

Methods of forming low-defect strain-relaxed layers on lattice-mism...

Methods of forming semiconductor patterns including reduced disloca...

Patents Applicationslast 30 patents

METHOD OF FORMING MULTIPLE-VT FETS FOR CMOS CIRCUIT APPLICATIONS

METHOD OF FORMING MULTIPLE-VT FETS FOR CMOS CIRCUIT APPLICATIONS

METHOD OF FORMING A THERMAL SHIELD IN A MONOLITHIC 3-D INTEGRATED C...

METHOD OF FORMING SACRIFICIAL SELF-ALIGNED FEATURES FOR ASSISTING D...

METHOD OF FORMING ISOLATION DIELECTRICS FOR STACKED FIELD EFFECT TR...

SEMICONDUCTOR DEVICE INCLUDING A REPEATER/BUFFER AT UPPER METAL ROU...

METHOD OF FORMING MULTI-THRESHOLD VOLTAGE DEVICES USING DIPOLE-HIGH...

METHOD OF FORMING A THERMAL SHIELD IN A MONOLITHIC 3-D INTEGRATED C...

METHOD OF FORMING MULTIPLE-VT FETS FOR CMOS CIRCUIT APPLICATIONS

METHOD OF FORMING CRYSTALLINE OXIDES ON III-V MATERIALS

METHOD OF FORMING MULTI-THRESHOLD VOLTAGE DEVICES AND DEVICES SO FO...

METHOD OF FORMING MULTI-THRESHOLD VOLTAGE DEVICES USING DIPOLE-HIGH...

METHOD OF PROVIDING SOURCE AND DRAIN DOPING FOR CMOS ARCHITECTURE I...

METHOD OF FORMING MULTI-THRESHOLD VOLTAGE DEVICES AND DEVICES SO FO...

SEMICONDUCTOR DEVICE INCLUDING A REPEATER/BUFFER AT UPPER METAL ROU...

COMPLIMENTARY METAL-OXIDE-SEMICONDUCTOR CIRCUIT HAVING TRANSISTORS...

METHOD OF FORMING CRYSTALLINE OXIDES ON III-V MATERIALS

HORIZONTAL NANOSHEET FETS AND METHOD OF MANUFACTURING THE SAME

METHOD OF FORMING INTERNAL DIELECTRIC SPACERS FOR HORIZONTAL NANOSH...

NANOSHEET AND NANOWIRE DEVICES HAVING SOURCE/DRAIN STRESSORS AND ME...

MULTI-VT GATE STACK FOR III-V NANOSHEET DEVICES WITH REDUCED PARASI...

SEMICONDUCTOR DEVICE INCLUDING A REPEATER/BUFFER AT HIGHER METAL RO...

Methods of Forming Nanosheets on Lattice Mismatched Substrates

Relaxed Semiconductor Layers With Reduced Defects and Methods of Fo...

MULTI-LAYER FIN FIELD EFFECT TRANSISTOR DEVICES AND METHODS OF FORM...

RECTANGULAR NANOSHEET FABRICATION

INTERFACE LAYER FOR GATE STACK USING 03 POST TREATMENT

METHODS OF FORMING DEFECT-FREE SRB ONTO LATTICE-MISMATCHED SUBSTRAT...

METHODS OF FORMING LOW-DEFECT STRAIN-RELAXED LAYERS ON LATTICE-MISM...

METHODS OF FORMING SEMICONDUCTOR PATTERNS INCLUDING REDUCED DISLOCA...