Wei-Lun Kane Jen

Person

Chandler, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Sacrificial pads to prevent galvanic corrosion of FLI bumps in EMIB...
- Patent number 12,068,172
- Issue date Aug 20, 2024
- Intel Corporation
- Tarek A. Ibrahim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device and method of very high density routing used with embedded m...
- Patent number 12,040,276
- Issue date Jul 16, 2024
- Intel Corporation
- Robert Alan May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device and method of very high density routing used with embedded m...
- Patent number 12,014,989
- Issue date Jun 18, 2024
- Intel Corporation
- Robert Alan May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High density organic bridge device and method
- Patent number 12,002,762
- Issue date Jun 4, 2024
- Intel Corporation
- Mihir K. Roy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package with underfill containment barrier
- Patent number 11,935,805
- Issue date Mar 19, 2024
- Intel Corporation
- Rahul Jain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic structures including bridges
- Patent number 11,923,307
- Issue date Mar 5, 2024
- Intel Corporation
- Bai Nie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual trace thickness for single layer routing
- Patent number 11,769,719
- Issue date Sep 26, 2023
- Intel Corporation
- Jonathan Rosch
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Inductors for package substrates
- Patent number 11,764,150
- Issue date Sep 19, 2023
- Intel Corporation
- Sri Chaitra Jyotsna Chavali
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package with underfill containment barrier
- Patent number 11,664,290
- Issue date May 30, 2023
- Intel Corporation
- Rahul Jain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods to pattern TFC and incorporation in the ODI architecture an...
- Patent number 11,581,271
- Issue date Feb 14, 2023
- Intel Corporation
- Rahul Jain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate patch reconstitution options
- Patent number 11,552,019
- Issue date Jan 10, 2023
- Intel Corporation
- Haifa Hariri
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic structures including bridges
- Patent number 11,521,931
- Issue date Dec 6, 2022
- Intel Corporation
- Jason M. Gamba
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device and method of very high density routing used with embedded m...
- Patent number 11,508,662
- Issue date Nov 22, 2022
- Intel Corporation
- Robert Alan May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming a package substrate
- Patent number 11,443,970
- Issue date Sep 13, 2022
- Intel Corporation
- Manohar S. Konchady
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enabling magnetic films in inductors integrated into semiconductor...
- Patent number 11,270,959
- Issue date Mar 8, 2022
- Intel Corporation
- Kirstof Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package with underfill containment barrier
- Patent number 11,158,558
- Issue date Oct 26, 2021
- Intel Corporation
- Rahul Jain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Asymmetric electronic substrate and method of manufacture
- Patent number 10,980,129
- Issue date Apr 13, 2021
- Intel Corporation
- Sri Chaitra Jyotsna Chavali
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Die interconnect substrate, an electrical device, and a method for...
- Patent number 10,978,399
- Issue date Apr 13, 2021
- Intel Corporation
- Kristof Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device including silane based adhesion promoter and m...
- Patent number 10,916,486
- Issue date Feb 9, 2021
- Intel Corporation
- Andrew J. Brown
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High density organic bridge device and method
- Patent number 10,672,713
- Issue date Jun 2, 2020
- Intel Corporation
- Mihir K. Roy
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Solder resist layer structures for terminating de-featured componen...
- Patent number 10,658,198
- Issue date May 19, 2020
- Intel Corporation
- Li-Sheng Weng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Solder resist layers for coreless packages and methods of fabrication
- Patent number 10,629,469
- Issue date Apr 21, 2020
- Intel Corporation
- Manohar S. Konchady
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Asymmetric electronic substrate and method of manufacture
- Patent number 10,624,213
- Issue date Apr 14, 2020
- Intel Corporation
- Sri Chaitra Jyotsna Chavali
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Solder resist layer structures for terminating de-featured componen...
- Patent number 10,244,632
- Issue date Mar 26, 2019
- Intel Corporation
- Li-Sheng Weng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
High density organic bridge device and method
- Patent number 10,103,105
- Issue date Oct 16, 2018
- Intel Corporation
- Mihir K. Roy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High resolution solder resist material for silicon bridge application
- Patent number 10,020,262
- Issue date Jul 10, 2018
- Intel Corporation
- Siddharth K. Alur
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multilayer substrate for semiconductor packaging
- Patent number 9,788,416
- Issue date Oct 10, 2017
- Intel Corporation
- Wei-Lun Kane Jen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual side solder resist layers for coreless packages and packages w...
- Patent number 9,704,735
- Issue date Jul 11, 2017
- Intel Corporation
- Manohar S. Konchady
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic package with narrow-factor via including finish layer
- Patent number 9,603,247
- Issue date Mar 21, 2017
- Intel Corporation
- Rajasekaran Swaminathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High density organic bridge device and method
- Patent number 9,548,264
- Issue date Jan 17, 2017
- Intel Corporation
- Mihir K. Roy
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
HIGH DENSITY ORGANIC BRIDGE DEVICE AND METHOD
- Publication number 20240321762
- Publication date Sep 26, 2024
- Intel Corporation
- Mihir K. Roy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE AND METHOD OF VERY HIGH DENSITY ROUTING USED WITH EMBEDDED M...
- Publication number 20240258240
- Publication date Aug 1, 2024
- Intel Corporation
- Robert Alan May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE WITH UNDERFILL CONTAINMENT BARRIER
- Publication number 20240186202
- Publication date Jun 6, 2024
- Intel Corporation
- Rahul JAIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE SUBSTRATE WITH OPEN AIR GAP STRUCTURES
- Publication number 20240113049
- Publication date Apr 4, 2024
- Intel Corporation
- Kristof Kuwawi Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL TRACE THICKNESS FOR SINGLE LAYER ROUTING
- Publication number 20230369192
- Publication date Nov 16, 2023
- Intel Corporation
- Jonathan ROSCH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUBSTRATE WITH LOW-PERMITTIVITY CORE AND BUILDUP LAYERS
- Publication number 20230317592
- Publication date Oct 5, 2023
- Intel Corporation
- Brandon Christian Marin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE WITH UNDERFILL CONTAINMENT BARRIER
- Publication number 20230245940
- Publication date Aug 3, 2023
- Intel Corporation
- Rahul JAIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE AND METHOD OF VERY HIGH DENSITY ROUTING USED WITH EMBEDDED M...
- Publication number 20230135165
- Publication date May 4, 2023
- Intel Corporation
- Robert Alan May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE AND METHOD OF VERY HIGH DENSITY ROUTING USED WITH EMBEDDED M...
- Publication number 20220392842
- Publication date Dec 8, 2022
- Intel Corporation
- Robert Alan May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NOVEL LGA ARCHITECTURE FOR IMPROVING RELIABILITY PERFORMANCE OF MET...
- Publication number 20220199503
- Publication date Jun 23, 2022
- Intel Corporation
- Manish DUBEY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE WITH UNDERFILL CONTAINMENT BARRIER
- Publication number 20210391232
- Publication date Dec 16, 2021
- Intel Corporation
- Rahul Jain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC STRUCTURES INCLUDING BRIDGES
- Publication number 20210391263
- Publication date Dec 16, 2021
- Intel Corporation
- Bai Nie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC STRUCTURES INCLUDING BRIDGES
- Publication number 20210391266
- Publication date Dec 16, 2021
- Intel Corporation
- Jason M. Gamba
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE AND METHOD OF VERY HIGH DENSITY ROUTING USED WITH EMBEDDED M...
- Publication number 20210280517
- Publication date Sep 9, 2021
- Intel Corporation
- Robert Alan May
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE WITH UNDERFILL CONTAINMENT BARRIER
- Publication number 20210111088
- Publication date Apr 15, 2021
- Intel Corporation
- Rahul Jain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SACRIFICIAL PADS TO PREVENT GALVANIC CORROSION OF FLI BUMPS IN EMIB...
- Publication number 20210035818
- Publication date Feb 4, 2021
- Intel Corporation
- Tarek A. IBRAHIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INDUCTORS FOR PACKAGE SUBSTRATES
- Publication number 20210005550
- Publication date Jan 7, 2021
- Sri Chaitra Jyotsna CHAVALI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUBSTRATE PATCH RECONSTITUTION OPTIONS
- Publication number 20200294920
- Publication date Sep 17, 2020
- Intel Corporation
- Haifa HARIRI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS TO PATTERN TFC AND INCORPORATION IN THE ODI ARCHITECTURE AN...
- Publication number 20200294938
- Publication date Sep 17, 2020
- Intel Corporation
- Rahul JAIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH DENSITY ORGANIC BRIDGE DEVICE AND METHOD
- Publication number 20200294924
- Publication date Sep 17, 2020
- Intel Corporation
- Mihir K. Roy
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
ASYMMETRIC ELECTRONIC SUBSTRATE AND METHOD OF MANUFACTURE
- Publication number 20200221577
- Publication date Jul 9, 2020
- Intel Corporation
- Sri Chaitra Jyotsna Chavali
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
SOLDER RESIST LAYERS FOR CORELESS PACKAGES AND METHODS OF FABRICATION
- Publication number 20200194300
- Publication date Jun 18, 2020
- Intel Corporation
- Manohar S. KONCHADY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MAGNETIC CORE INDUCTORS ON PACKAGE SUBSTRATES
- Publication number 20200066830
- Publication date Feb 27, 2020
- Intel Corporation
- Krishna Bharath
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Die Interconnect Substrate, an Electrical Device, and a Method for...
- Publication number 20200051915
- Publication date Feb 13, 2020
- Intel Corporation
- Kristof Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL TRACE THICKNESS FOR SINGLE LAYER ROUTING
- Publication number 20190393143
- Publication date Dec 26, 2019
- Intel Corporation
- Jonathan ROSCH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD OF MAKING
- Publication number 20190355642
- Publication date Nov 21, 2019
- Intel Corporation
- Andrew J. Brown
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENABLING MAGNETIC FILMS IN INDUCTORS INTEGRATED INTO SEMICONDUCTOR...
- Publication number 20190295967
- Publication date Sep 26, 2019
- Intel Corporation
- Kirstof DARMAWIKARTA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOLDER RESIST LAYER STRUCTURES FOR TERMINATING DE-FEATURED COMPONEN...
- Publication number 20190181017
- Publication date Jun 13, 2019
- Intel Corporation
- Li-Sheng Weng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
HIGH DENSITY ORGANIC BRIDGE DEVICE AND METHOD
- Publication number 20190019755
- Publication date Jan 17, 2019
- Intel Corporation
- Mihir K. Roy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOLDER RESIST LAYER STRUCTURES FOR TERMINATING DE-FEATURED COMPONEN...
- Publication number 20180255640
- Publication date Sep 6, 2018
- Intel Corporation
- Li-Sheng Weng
- H01 - BASIC ELECTRIC ELEMENTS

Wei-Lun Kane Jen

Person

Patents Grantslast 30 patents

Sacrificial pads to prevent galvanic corrosion of FLI bumps in EMIB...

Device and method of very high density routing used with embedded m...

Device and method of very high density routing used with embedded m...

High density organic bridge device and method

Package with underfill containment barrier

Microelectronic structures including bridges

Dual trace thickness for single layer routing

Inductors for package substrates

Package with underfill containment barrier

Methods to pattern TFC and incorporation in the ODI architecture an...

Substrate patch reconstitution options

Microelectronic structures including bridges

Device and method of very high density routing used with embedded m...

Methods of forming a package substrate

Enabling magnetic films in inductors integrated into semiconductor...

Package with underfill containment barrier

Asymmetric electronic substrate and method of manufacture

Die interconnect substrate, an electrical device, and a method for...

Semiconductor device including silane based adhesion promoter and m...

High density organic bridge device and method

Solder resist layer structures for terminating de-featured componen...

Solder resist layers for coreless packages and methods of fabrication

Asymmetric electronic substrate and method of manufacture

Solder resist layer structures for terminating de-featured componen...

High density organic bridge device and method

High resolution solder resist material for silicon bridge application

Multilayer substrate for semiconductor packaging

Dual side solder resist layers for coreless packages and packages w...

Electronic package with narrow-factor via including finish layer

High density organic bridge device and method

Patents Applicationslast 30 patents

HIGH DENSITY ORGANIC BRIDGE DEVICE AND METHOD

DEVICE AND METHOD OF VERY HIGH DENSITY ROUTING USED WITH EMBEDDED M...

PACKAGE WITH UNDERFILL CONTAINMENT BARRIER

PACKAGE SUBSTRATE WITH OPEN AIR GAP STRUCTURES

DUAL TRACE THICKNESS FOR SINGLE LAYER ROUTING

SUBSTRATE WITH LOW-PERMITTIVITY CORE AND BUILDUP LAYERS

PACKAGE WITH UNDERFILL CONTAINMENT BARRIER

DEVICE AND METHOD OF VERY HIGH DENSITY ROUTING USED WITH EMBEDDED M...

DEVICE AND METHOD OF VERY HIGH DENSITY ROUTING USED WITH EMBEDDED M...

NOVEL LGA ARCHITECTURE FOR IMPROVING RELIABILITY PERFORMANCE OF MET...

PACKAGE WITH UNDERFILL CONTAINMENT BARRIER

MICROELECTRONIC STRUCTURES INCLUDING BRIDGES

MICROELECTRONIC STRUCTURES INCLUDING BRIDGES

DEVICE AND METHOD OF VERY HIGH DENSITY ROUTING USED WITH EMBEDDED M...

PACKAGE WITH UNDERFILL CONTAINMENT BARRIER

SACRIFICIAL PADS TO PREVENT GALVANIC CORROSION OF FLI BUMPS IN EMIB...

INDUCTORS FOR PACKAGE SUBSTRATES

SUBSTRATE PATCH RECONSTITUTION OPTIONS

METHODS TO PATTERN TFC AND INCORPORATION IN THE ODI ARCHITECTURE AN...

HIGH DENSITY ORGANIC BRIDGE DEVICE AND METHOD

ASYMMETRIC ELECTRONIC SUBSTRATE AND METHOD OF MANUFACTURE

SOLDER RESIST LAYERS FOR CORELESS PACKAGES AND METHODS OF FABRICATION

MAGNETIC CORE INDUCTORS ON PACKAGE SUBSTRATES

Die Interconnect Substrate, an Electrical Device, and a Method for...

DUAL TRACE THICKNESS FOR SINGLE LAYER ROUTING

SEMICONDUCTOR DEVICE AND METHOD OF MAKING

ENABLING MAGNETIC FILMS IN INDUCTORS INTEGRATED INTO SEMICONDUCTOR...

SOLDER RESIST LAYER STRUCTURES FOR TERMINATING DE-FEATURED COMPONEN...

HIGH DENSITY ORGANIC BRIDGE DEVICE AND METHOD

SOLDER RESIST LAYER STRUCTURES FOR TERMINATING DE-FEATURED COMPONEN...