Wei Yee Koay

Person

Bayan Lepas, MY

People

Patents Grantslast 30 patents

Information Patent Grant
Edge devices utilizing personalized machine learning and methods of...
- Patent number 11,599,750
- Issue date Mar 7, 2023
- Intel Corporation
- Maruti Gupta Hyde
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for re-programmable hardware in autonomous vehicles
- Patent number 11,586,492
- Issue date Feb 21, 2023
- Intel Corporation
- Wei Yee Koay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for preventing voltage tampering of security control cir...
- Patent number 11,443,073
- Issue date Sep 13, 2022
- Intel Corporation
- Wei Yee Koay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for re-programmable hardware in autonomous vehicles
- Patent number 11,126,496
- Issue date Sep 21, 2021
- Intel Corporation
- Wei Yee Koay
- G05 - CONTROLLING REGULATING
Information Patent Grant
Automated loading services for computer assisted or autonomous driv...
- Patent number 11,104,529
- Issue date Aug 31, 2021
- Intel Corporation
- Lady Nataly Pinilla Pico
- B65 - CONVEYING PACKING STORING HANDLING THIN OR FILAMENTARY MATERIAL
Information Patent Grant
Methods and apparatus for reducing power consumption in memory circ...
- Patent number 10,431,269
- Issue date Oct 1, 2019
- Altera Corporation
- Rajiv Kumar
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for security in an integrated circuit
- Patent number 10,228,415
- Issue date Mar 12, 2019
- Altera Corporation
- Wei Yee Koay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory elements with dynamic pull-up weakening write assist circuitry
- Patent number 9,767,892
- Issue date Sep 19, 2017
- Altera Corporation
- Rajiv Kumar
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatus for performing boosted bit line precharge
- Patent number 9,299,404
- Issue date Mar 29, 2016
- Chin Ghee Ch'ng
- G11 - INFORMATION STORAGE
Information Patent Grant
Interface circuitry for an integrated circuit system
- Patent number 8,760,328
- Issue date Jun 24, 2014
- Altera Corporation
- Wei Yee Koay
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory circuitry with dynamic power control
- Patent number 8,699,291
- Issue date Apr 15, 2014
- Altera Corporation
- Chin Ghee Ch'ng
- G11 - INFORMATION STORAGE
Information Patent Grant
Configurable memory block
- Patent number 8,400,863
- Issue date Mar 19, 2013
- Altera Corporation
- Zun Yang Tan
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic real-time delay characterization and configuration
- Patent number 7,787,314
- Issue date Aug 31, 2010
- Altera Corporation
- Jun Pin Tan
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable power down scheme for embedded memory block
- Patent number 7,760,577
- Issue date Jul 20, 2010
- Altera Corporation
- Wei Yee Koay
- G11 - INFORMATION STORAGE
Information Patent Grant
Using dedicated read output path to reduce unregistered read access...
- Patent number 7,715,271
- Issue date May 11, 2010
- Altera Corporation
- Haiming Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Using dedicated read output path to reduce unregistered read access...
- Patent number 7,414,916
- Issue date Aug 19, 2008
- Altera Corporation
- Haiming Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable soft macro memory using gate array base cells
- Patent number 7,305,640
- Issue date Dec 4, 2007
- Altera Corporation
- Hee Kong Phoon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual-port memory array using shared write drivers and read sense am...
- Patent number 7,289,372
- Issue date Oct 30, 2007
- Altera Corporation
- Haiming Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Divisible true dual port memory system supporting simple dual port...
- Patent number 7,269,089
- Issue date Sep 11, 2007
- Altera Corporation
- Haiming Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for memory block initialization
- Patent number 7,221,185
- Issue date May 22, 2007
- Altera Corporation
- Haiming Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Divisible true dual port memory system supporting simple dual port...
- Patent number 7,130,238
- Issue date Oct 31, 2006
- Altera Corporation
- Haiming Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual port memory array using shared write drivers and read sense am...
- Patent number 7,110,304
- Issue date Sep 19, 2006
- Altera Corporation
- Haiming Yu
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
TECHNOLOGIES FOR RE-PROGRAMMABLE HARDWARE IN AUTONOMOUS VEHICLES
- Publication number 20230281075
- Publication date Sep 7, 2023
- Intel Corporation
- Wei Yee Koay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR RE-PROGRAMMABLE HARDWARE IN AUTONOMOUS VEHICLES
- Publication number 20220004452
- Publication date Jan 6, 2022
- Intel Corporation
- Wei Yee Koay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable High-Speed and Low-power Mode FPGA Memory with Configu...
- Publication number 20190228821
- Publication date Jul 25, 2019
- Intel Corporation
- Wei Yee Koay
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Techniques For Preventing Voltage Tampering Of Security Control Cir...
- Publication number 20190138754
- Publication date May 9, 2019
- Intel Corporation
- Wei Yee Koay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR RE-PROGRAMMABLE HARDWARE IN AUTONOMOUS VEHICLES
- Publication number 20190129789
- Publication date May 2, 2019
- Intel Corporation
- Wei Yee Koay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BLOCKCHAIN-BASED DIGITAL DATA EXCHANGE
- Publication number 20190050854
- Publication date Feb 14, 2019
- Intel Corporation
- Xue Yang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTOMATED LOADING SERVICES FOR COMPUTER ASSISTED OR AUTONOMOUS DRIV...
- Publication number 20190047801
- Publication date Feb 14, 2019
- Intel Corporation
- Lady Nataly PINILLA PICO
- G05 - CONTROLLING REGULATING
Information Patent Application
EDGE DEVICES UTILIZING PERSONALIZED MACHINE LEARNING AND METHODS OF...
- Publication number 20190050683
- Publication date Feb 14, 2019
- Intel Corporation
- Maruti Gupta Hyde
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR REDUCING POWER CONSUMPTION IN MEMORY CIRC...
- Publication number 20160225437
- Publication date Aug 4, 2016
- Altera Corporation
- Rajiv Kumar
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC REAL-TIME DELAY CHARACTERIZATION AND CONFIGURATION
- Publication number 20100061166
- Publication date Mar 11, 2010
- Altera Corporation
- Jun Pin Tan
- H03 - BASIC ELECTRONIC CIRCUITRY

Wei Yee Koay

Person

Patents Grantslast 30 patents

Edge devices utilizing personalized machine learning and methods of...

Technologies for re-programmable hardware in autonomous vehicles

Techniques for preventing voltage tampering of security control cir...

Technologies for re-programmable hardware in autonomous vehicles

Automated loading services for computer assisted or autonomous driv...

Methods and apparatus for reducing power consumption in memory circ...

Apparatus and method for security in an integrated circuit

Memory elements with dynamic pull-up weakening write assist circuitry

Methods and apparatus for performing boosted bit line precharge

Interface circuitry for an integrated circuit system

Memory circuitry with dynamic power control

Configurable memory block

Dynamic real-time delay characterization and configuration

Programmable power down scheme for embedded memory block

Using dedicated read output path to reduce unregistered read access...

Using dedicated read output path to reduce unregistered read access...

Programmable soft macro memory using gate array base cells

Dual-port memory array using shared write drivers and read sense am...

Divisible true dual port memory system supporting simple dual port...

Method and apparatus for memory block initialization

Divisible true dual port memory system supporting simple dual port...

Dual port memory array using shared write drivers and read sense am...

Patents Applicationslast 30 patents

TECHNOLOGIES FOR RE-PROGRAMMABLE HARDWARE IN AUTONOMOUS VEHICLES

TECHNOLOGIES FOR RE-PROGRAMMABLE HARDWARE IN AUTONOMOUS VEHICLES

Programmable High-Speed and Low-power Mode FPGA Memory with Configu...

Techniques For Preventing Voltage Tampering Of Security Control Cir...

TECHNOLOGIES FOR RE-PROGRAMMABLE HARDWARE IN AUTONOMOUS VEHICLES

BLOCKCHAIN-BASED DIGITAL DATA EXCHANGE

AUTOMATED LOADING SERVICES FOR COMPUTER ASSISTED OR AUTONOMOUS DRIV...

EDGE DEVICES UTILIZING PERSONALIZED MACHINE LEARNING AND METHODS OF...

METHODS AND APPARATUS FOR REDUCING POWER CONSUMPTION IN MEMORY CIRC...

DYNAMIC REAL-TIME DELAY CHARACTERIZATION AND CONFIGURATION