Weimin Han

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Stacked thermal processing chamber modules for remote radiative hea...
- Patent number 11,482,433
- Issue date Oct 25, 2022
- Intel Corporation
- Ashutosh Sagar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-planar semiconductor device having omega-fin with doped sub-fin...
- Patent number 11,276,760
- Issue date Mar 15, 2022
- Intel Corporation
- Gopinath Bhimarasetti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-planar semiconductor device having omega-fin with doped sub-fin...
- Patent number 10,355,093
- Issue date Jul 16, 2019
- Intel Corporation
- Gopinath Bhimarasetti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of processing a substrate
- Patent number 6,140,251
- Issue date Oct 31, 2000
- Intel Corporation
- Reza Arghavani
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
N-TYPE TRANSISTOR FABRICATION IN COMPLEMENTARY FET (CFET) DEVICES
- Publication number 20250006812
- Publication date Jan 2, 2025
- Intel Corporation
- Sudipto Naskar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ARCHITECTURES AND METHODS FOR COMPUTATION IN MEMORY (CIM) WITH BACK...
- Publication number 20240324167
- Publication date Sep 26, 2024
- Intel Corporation
- Sudipto Naskar
Information Patent Application
IN-SITU MULTI-LAYER DIELECTRIC FILMS FOR APPLICATION AS GATE SPACER...
- Publication number 20240006512
- Publication date Jan 4, 2024
- Intel Corporation
- Walter CASPER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VIA PROFILE SHRINK FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRIC...
- Publication number 20230178426
- Publication date Jun 8, 2023
- Intel Corporation
- Tiffany ZINK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NON-PLANAR SEMICONDUCTOR DEVICE HAVING OMEGA-FIN WITH DOPED SUB-FIN...
- Publication number 20220130962
- Publication date Apr 28, 2022
- Intel Corporation
- GOPINATH BHIMARASETTI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED THERMAL PROCESSING CHAMBER MODULES FOR REMOTE RADIATIVE HEA...
- Publication number 20220020613
- Publication date Jan 20, 2022
- Intel Corporation
- Ashutosh Sagar
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
NON-PLANAR SEMICONDUCTOR DEVICE HAVING OMEGA-FIN WITH DOPED SUB-FIN...
- Publication number 20190296114
- Publication date Sep 26, 2019
- Intel Corporation
- GOPINATH BHIMARASETTI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS AND METHODS TO CREATE MICROELECTRONIC DEVICE ISOLATION BY...
- Publication number 20170162693
- Publication date Jun 8, 2017
- Intel Corporation
- Gopinath Bhimarasetti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NON-PLANAR SEMICONDUCTOR DEVICE HAVING OMEGA-FIN WITH DOPED SUB-FIN...
- Publication number 20170069725
- Publication date Mar 9, 2017
- Intel Corporation
- GOPINATH BHIMARASETTI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONVERTING A HIGH DIELECTRIC SPACER TO A LOW DIELECTRIC SPACER
- Publication number 20140175566
- Publication date Jun 26, 2014
- Gopinath Bhimarasetti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Sidewall spacers and methods of making same
- Publication number 20020127763
- Publication date Sep 12, 2002
- Mohamed Arafa
- H01 - BASIC ELECTRIC ELEMENTS

Person

Patents Grantslast 30 patents

Stacked thermal processing chamber modules for remote radiative hea...

Non-planar semiconductor device having omega-fin with doped sub-fin...

Non-planar semiconductor device having omega-fin with doped sub-fin...

Method of processing a substrate

Patents Applicationslast 30 patents

N-TYPE TRANSISTOR FABRICATION IN COMPLEMENTARY FET (CFET) DEVICES

ARCHITECTURES AND METHODS FOR COMPUTATION IN MEMORY (CIM) WITH BACK...

IN-SITU MULTI-LAYER DIELECTRIC FILMS FOR APPLICATION AS GATE SPACER...

VIA PROFILE SHRINK FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRIC...

NON-PLANAR SEMICONDUCTOR DEVICE HAVING OMEGA-FIN WITH DOPED SUB-FIN...

STACKED THERMAL PROCESSING CHAMBER MODULES FOR REMOTE RADIATIVE HEA...

NON-PLANAR SEMICONDUCTOR DEVICE HAVING OMEGA-FIN WITH DOPED SUB-FIN...

APPARATUS AND METHODS TO CREATE MICROELECTRONIC DEVICE ISOLATION BY...

NON-PLANAR SEMICONDUCTOR DEVICE HAVING OMEGA-FIN WITH DOPED SUB-FIN...

CONVERTING A HIGH DIELECTRIC SPACER TO A LOW DIELECTRIC SPACER

Sidewall spacers and methods of making same