William C. HASENPLAUGH

Person

Cambridge, MA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Processors, methods, systems, and instructions to load multiple dat...
- Patent number 11,068,264
- Issue date Jul 20, 2021
- Intel Corporation
- William C. Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low energy consumption mantissa multiplication for floating point m...
- Patent number 10,402,168
- Issue date Sep 3, 2019
- Intel Corporation
- William C. Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processors, methods, systems, and instructions to load multiple dat...
- Patent number 10,379,855
- Issue date Aug 13, 2019
- Intel Corporation
- William C. Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High bandwidth full-block write commands
- Patent number 10,102,124
- Issue date Oct 16, 2018
- Intel Corporation
- Simon C. Steely
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware apparatuses and methods to control cache line coherency
- Patent number 9,934,146
- Issue date Apr 3, 2018
- Intel Corporation
- Simon C. Steely
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware apparatuses and methods to control cache line coherence
- Patent number 9,740,617
- Issue date Aug 22, 2017
- Intel Corporation
- Samantika Sury
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multicast tree-based data distribution in distributed shared cache
- Patent number 9,734,069
- Issue date Aug 15, 2017
- Intel Corporation
- Simon C. Steely
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address range priority mechanism
- Patent number 9,727,482
- Issue date Aug 8, 2017
- Intel Corporation
- Simon Steely
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Domain state
- Patent number 9,588,889
- Issue date Mar 7, 2017
- Intel Corporation
- Simon C. Steely
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address range priority mechanism
- Patent number 9,477,610
- Issue date Oct 25, 2016
- Intel Corporation
- Simon Steely
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for optimizing the usage of cache memories
- Patent number 9,418,016
- Issue date Aug 16, 2016
- Intel Corporation
- Simon C. Steely
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Hardware compilation and/or translation with fault detection and ro...
- Patent number 9,317,263
- Issue date Apr 19, 2016
- Intel Corporation
- Nicholas Cheng Hwa Chee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable multi-layer 2D-mesh routers
- Patent number 9,294,419
- Issue date Mar 22, 2016
- Intel Corporation
- William C. Hasenplaugh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Signature based hit-predicting cache
- Patent number 9,262,327
- Issue date Feb 16, 2016
- Intel Corporation
- Simon C. Steely
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Distributed power management for multi-core processors
- Patent number 9,250,682
- Issue date Feb 2, 2016
- Intel Corporation
- William C. Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Update mask for handling interaction between fills and updates
- Patent number 9,251,073
- Issue date Feb 2, 2016
- Intel Corporation
- Simon C. Steely
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Short circuit of probes in a chain
- Patent number 9,201,792
- Issue date Dec 1, 2015
- Intel Corporation
- Simon C. Steely
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Retrieval of previously accessed data in a multi-core processor
- Patent number 9,146,871
- Issue date Sep 29, 2015
- Intel Corporation
- Simon C. Steely
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable precision floating point multiply-add circuit
- Patent number 9,104,474
- Issue date Aug 11, 2015
- Intel Corporation
- Himanshu Kaul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient support of sparse data structure access
- Patent number 9,037,804
- Issue date May 19, 2015
- Intel Corporation
- Simon C. Steely
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware compilation and/or translation with fault detection and ro...
- Patent number 8,893,094
- Issue date Nov 18, 2014
- Intel Corporation
- Nicholas Cheng Hwa Chee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technique for controlling computing resources
- Patent number 8,769,201
- Issue date Jul 1, 2014
- Intel Corporation
- William Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Probe speculative address file
- Patent number 8,438,335
- Issue date May 7, 2013
- Intel Corporation
- Simon C. Steely
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache spill management techniques using cache spill prediction
- Patent number 8,407,421
- Issue date Mar 26, 2013
- Intel Corporation
- Simon C. Steely
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modular reduction using folding
- Patent number 8,229,109
- Issue date Jul 24, 2012
- Intel Corporation
- William C. Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cryptographic system, method and multiplier
- Patent number 8,073,892
- Issue date Dec 6, 2011
- Intel Corporation
- Wajdi K. Feghali
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware accelerator
- Patent number 8,020,142
- Issue date Sep 13, 2011
- Intel Corporation
- Gilbert M. Wolrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplying two numbers
- Patent number 7,930,337
- Issue date Apr 19, 2011
- Intel Corporation
- William C. Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable processing unit with an input buffer and output buffer...
- Patent number 7,900,022
- Issue date Mar 1, 2011
- Intel Corporation
- Wajdi K. Feghali
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determining message residue using a set of polynomials
- Patent number 7,827,471
- Issue date Nov 2, 2010
- Intel Corporation
- William C. Hasenplaugh
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS TO LOAD MULTIPLE DAT...
- Publication number 20190384601
- Publication date Dec 19, 2019
- Intel Corporation
- William C. Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW ENERGY CONSUMPTION MANTISSA MULTIPLICATION FOR FLOATING POINT M...
- Publication number 20180095728
- Publication date Apr 5, 2018
- Intel Corporation
- William C. Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS TO LOAD MULTIPLE DAT...
- Publication number 20180095756
- Publication date Apr 5, 2018
- Intel Corporation
- William C. Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADDRESS RANGE PRIORITY MECHANISM
- Publication number 20170010974
- Publication date Jan 12, 2017
- Intel Corporation
- Simon Steely
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE APPARATUSES AND METHODS TO CONTROL CACHE LINE COHERENCE
- Publication number 20160179674
- Publication date Jun 23, 2016
- Intel Corporation
- Samantika Sury
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTICAST TREE-BASED DATA DISTRIBUTION IN DISTRIBUTED SHARED CACHE
- Publication number 20160170880
- Publication date Jun 16, 2016
- Intel Corporation
- Simon C. Steely
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE APPARATUSES AND METHODS TO CONTROL CACHE LINE COHERENCY
- Publication number 20160092354
- Publication date Mar 31, 2016
- Intel Corporation
- Simon C. Steely
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE COMPILATION AND/OR TRANSLATION WITH FAULT DETECTION AND RO...
- Publication number 20150046910
- Publication date Feb 12, 2015
- Intel Corporation
- Nicholas Cheng Hwa Chee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE MULTI-LAYER 2D-MESH ROUTERS
- Publication number 20150003281
- Publication date Jan 1, 2015
- William C. Hasenplaugh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
RETRIEVAL OF PREVIOUSLY ACCESSED DATA IN A MULTI-CORE PROCESSOR
- Publication number 20140215162
- Publication date Jul 31, 2014
- Simon C. Steeley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH BANDWIDTH FULL-BLOCK WRITE COMMANDS
- Publication number 20140201446
- Publication date Jul 17, 2014
- Simon C. Steeley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISTRIBUTED POWER MANAGEMENT FOR MULTI-CORE PROCESSORS
- Publication number 20140189413
- Publication date Jul 3, 2014
- William C. Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UPDATE MASK FOR HANDLING INTERACTION BETWEEN FILLS AND UPDATES
- Publication number 20140189251
- Publication date Jul 3, 2014
- Simon C. Steely
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VARIABLE PRECISION FLOATING POINT MULTIPLY-ADD CIRCUIT
- Publication number 20140188968
- Publication date Jul 3, 2014
- Himanshu KAUL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DOMAIN STATE
- Publication number 20140052920
- Publication date Feb 20, 2014
- Simon C. Steely
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIGNATURE BASED HIT-PREDICTING CACHE
- Publication number 20140006717
- Publication date Jan 2, 2014
- Intel Corporation
- Simon C. STEELY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA CONTROL USING LAST ACCESSOR INFORMATION
- Publication number 20140006716
- Publication date Jan 2, 2014
- Simon C. Steeley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADDRESS RANGE PRIORITY MECHANISM
- Publication number 20130339621
- Publication date Dec 19, 2013
- Simon Steely
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHORT CIRCUIT OF PROBES IN A CHAIN
- Publication number 20130326147
- Publication date Dec 5, 2013
- Simon C. Steely
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT SUPPORT OF SPARSE DATA STRUCTURE ACCESS
- Publication number 20130297883
- Publication date Nov 7, 2013
- Simon C. Steely
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE COMPILATION AND/OR TRANSLATION WITH FAULT DETECTION AND RO...
- Publication number 20130173893
- Publication date Jul 4, 2013
- Nicholas Cheng Hwa Chee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM TO IMPROVE UNALIGNED CACHE MEMORY ACCESSES
- Publication number 20120246407
- Publication date Sep 27, 2012
- WILLIAM C. HASENPLAUGH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR OPTIMIZING THE USAGE OF CACHE MEMORIES
- Publication number 20120159077
- Publication date Jun 21, 2012
- SIMON C. STEELY, JR.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROBE SPECULATIVE ADDRESS FILE
- Publication number 20120079208
- Publication date Mar 29, 2012
- Simon C. Steely, JR.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CRYPTOGRAPHIC SYSTEM, METHOD AND MULTIPLIER
- Publication number 20110264720
- Publication date Oct 27, 2011
- Wajdi Feghali
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CROSS-FEEDBACK PHASE-LOCKED LOOP FOR DISTRIBUTED CLOCKING SYSTEMS
- Publication number 20110248755
- Publication date Oct 13, 2011
- William C. Hasenplaugh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CACHE SPILL MANAGEMENT TECHNIQUES
- Publication number 20110145501
- Publication date Jun 16, 2011
- Simon C. Steely, JR.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for providing an area-efficient large unsigned...
- Publication number 20110106872
- Publication date May 5, 2011
- William Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Technique for controlling computing resources
- Publication number 20100138609
- Publication date Jun 3, 2010
- William Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamic quality of service (QoS) for a shared cache
- Publication number 20080235457
- Publication date Sep 25, 2008
- William C. Hasenplaugh
- G06 - COMPUTING CALCULATING COUNTING

William C. HASENPLAUGH

Person

Patents Grantslast 30 patents

Processors, methods, systems, and instructions to load multiple dat...

Low energy consumption mantissa multiplication for floating point m...

Processors, methods, systems, and instructions to load multiple dat...

High bandwidth full-block write commands

Hardware apparatuses and methods to control cache line coherency

Hardware apparatuses and methods to control cache line coherence

Multicast tree-based data distribution in distributed shared cache

Address range priority mechanism

Domain state

Address range priority mechanism

Method and apparatus for optimizing the usage of cache memories

Hardware compilation and/or translation with fault detection and ro...

Scalable multi-layer 2D-mesh routers

Signature based hit-predicting cache

Distributed power management for multi-core processors

Update mask for handling interaction between fills and updates

Short circuit of probes in a chain

Retrieval of previously accessed data in a multi-core processor

Variable precision floating point multiply-add circuit

Efficient support of sparse data structure access

Hardware compilation and/or translation with fault detection and ro...

Technique for controlling computing resources

Probe speculative address file

Cache spill management techniques using cache spill prediction

Modular reduction using folding

Cryptographic system, method and multiplier

Hardware accelerator

Multiplying two numbers

Programmable processing unit with an input buffer and output buffer...

Determining message residue using a set of polynomials

Patents Applicationslast 30 patents

PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS TO LOAD MULTIPLE DAT...

LOW ENERGY CONSUMPTION MANTISSA MULTIPLICATION FOR FLOATING POINT M...

PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS TO LOAD MULTIPLE DAT...

ADDRESS RANGE PRIORITY MECHANISM

HARDWARE APPARATUSES AND METHODS TO CONTROL CACHE LINE COHERENCE

MULTICAST TREE-BASED DATA DISTRIBUTION IN DISTRIBUTED SHARED CACHE

HARDWARE APPARATUSES AND METHODS TO CONTROL CACHE LINE COHERENCY

HARDWARE COMPILATION AND/OR TRANSLATION WITH FAULT DETECTION AND RO...

SCALABLE MULTI-LAYER 2D-MESH ROUTERS

RETRIEVAL OF PREVIOUSLY ACCESSED DATA IN A MULTI-CORE PROCESSOR

HIGH BANDWIDTH FULL-BLOCK WRITE COMMANDS

DISTRIBUTED POWER MANAGEMENT FOR MULTI-CORE PROCESSORS

UPDATE MASK FOR HANDLING INTERACTION BETWEEN FILLS AND UPDATES

VARIABLE PRECISION FLOATING POINT MULTIPLY-ADD CIRCUIT

DOMAIN STATE

SIGNATURE BASED HIT-PREDICTING CACHE

DATA CONTROL USING LAST ACCESSOR INFORMATION

ADDRESS RANGE PRIORITY MECHANISM

SHORT CIRCUIT OF PROBES IN A CHAIN

EFFICIENT SUPPORT OF SPARSE DATA STRUCTURE ACCESS

HARDWARE COMPILATION AND/OR TRANSLATION WITH FAULT DETECTION AND RO...

METHOD AND SYSTEM TO IMPROVE UNALIGNED CACHE MEMORY ACCESSES

METHOD AND APPARATUS FOR OPTIMIZING THE USAGE OF CACHE MEMORIES

PROBE SPECULATIVE ADDRESS FILE

CRYPTOGRAPHIC SYSTEM, METHOD AND MULTIPLIER

CROSS-FEEDBACK PHASE-LOCKED LOOP FOR DISTRIBUTED CLOCKING SYSTEMS

CACHE SPILL MANAGEMENT TECHNIQUES

Method and apparatus for providing an area-efficient large unsigned...

Technique for controlling computing resources

Dynamic quality of service (QoS) for a shared cache