William E. Jennings

Person

Cary, NC, US

People

Patents Grantslast 30 patents

Information Patent Grant
Programmable arrayed processing engine architecture for a network s...
- Patent number 7,895,412
- Issue date Feb 22, 2011
- Cisco Tehnology, Inc.
- Darren Kerr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Architecture for a processor complex of an arrayed pipelined proces...
- Patent number 7,380,101
- Issue date May 27, 2008
- Cisco Technology, Inc.
- Michael L. Wright
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Architecture for a processor complex of an arrayed pipelined proces...
- Patent number 6,836,838
- Issue date Dec 28, 2004
- Cisco Technology, Inc.
- Michael L. Wright
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable processing engine for efficiently processing transient...
- Patent number 6,513,108
- Issue date Jan 28, 2003
- Cisco Technology, Inc.
- Darren Kerr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Architecture for a process complex of an arrayed pipelined processi...
- Patent number 6,442,669
- Issue date Aug 27, 2002
- Cisco Technology, Inc.
- Michael L. Wright
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronization and control system for an arrayed processing engine
- Patent number 6,272,621
- Issue date Aug 7, 2001
- Cisco Technology, Inc.
- Kenneth Michael Key
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for generating error detection data for encaps...
- Patent number 6,226,771
- Issue date May 1, 2001
- Cisco Technology, Inc.
- Stephen C. Hilla
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for passing data among processor complex stage...
- Patent number 6,195,739
- Issue date Feb 27, 2001
- Cisco Technology, Inc.
- Michael L. Wright
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ensuring accurate data checksum
- Patent number 6,182,267
- Issue date Jan 30, 2001
- Cisco Technology, Inc.
- Jeffrey W. Kidd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel processor with debug capability
- Patent number 6,173,386
- Issue date Jan 9, 2001
- Cisco Technology, Inc.
- Kenneth Michael Key
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronization and control system for an arrayed processing engine
- Patent number 6,119,215
- Issue date Sep 12, 2000
- Cisco Technology, Inc.
- Kenneth Michael Key
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for context switching between processing elements in a pipel...
- Patent number 6,101,599
- Issue date Aug 8, 2000
- Cisco Technology, Inc.
- Michael L. Wright
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer system with cascaded peripheral component interconnect (PC...
- Patent number 5,632,021
- Issue date May 20, 1997
- Cisco Systems Inc.
- William E. Jennings
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Architecture for a processor complex of an arrayed pipelined proces...
- Publication number 20050125643
- Publication date Jun 9, 2005
- Michael L. Wright
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Architecture for a processor complex of an arrayed pipelined proces...
- Publication number 20010000046
- Publication date Mar 15, 2001
- Michael L. Wright
- G06 - COMPUTING CALCULATING COUNTING

William E. Jennings

Person

Patents Grantslast 30 patents

Programmable arrayed processing engine architecture for a network s...

Architecture for a processor complex of an arrayed pipelined proces...

Architecture for a processor complex of an arrayed pipelined proces...

Programmable processing engine for efficiently processing transient...

Architecture for a process complex of an arrayed pipelined processi...

Synchronization and control system for an arrayed processing engine

Method and apparatus for generating error detection data for encaps...

Method and apparatus for passing data among processor complex stage...

Ensuring accurate data checksum

Parallel processor with debug capability

Synchronization and control system for an arrayed processing engine

System for context switching between processing elements in a pipel...

Computer system with cascaded peripheral component interconnect (PC...

Patents Applicationslast 30 patents

Architecture for a processor complex of an arrayed pipelined proces...

Architecture for a processor complex of an arrayed pipelined proces...