William F. Burghout

Person

Mesa, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor die singulation method
- Patent number 9,847,219
- Issue date Dec 19, 2017
- Semiconductor Components Industries, LLC
- William F. Burghout
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor die singulation method
- Patent number 9,484,210
- Issue date Nov 1, 2016
- Semiconductor Components Industries, LLC
- William F. Burghout
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor die back layer separation method
- Patent number 9,337,098
- Issue date May 10, 2016
- Semiconductor Components Industries, LLC
- Michael Seddon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor die singulation method
- Patent number 9,034,733
- Issue date May 19, 2015
- SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- William F. Burghout
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor die singulation method
- Patent number 8,664,089
- Issue date Mar 4, 2014
- Semiconductor Components Industries, LLC
- William F. Burghout
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic package having down-set leads and method
- Patent number 8,319,323
- Issue date Nov 27, 2012
- Semiconductor Components Industries, LLC
- James P. Letterman, Jr.
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Method of forming a leaded molded array package
- Patent number 7,820,528
- Issue date Oct 26, 2010
- Semiconductor Components Industries, LLC
- William F. Burghout
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a leaded molded array package
- Patent number 7,588,999
- Issue date Sep 15, 2009
- Semiconductor Components Industries, LLC
- William F. Burghout
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package consisting of multiple conductive layers
- Patent number 6,081,031
- Issue date Jun 27, 2000
- Semiconductor Components Industries, LLC
- James P. Letterman
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR DIE SINGULATION METHOD
- Publication number 20170004965
- Publication date Jan 5, 2017
- Semiconductor Components Industries, LLC
- William F. Burghout
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DIE SINGULATION METHOD
- Publication number 20150228494
- Publication date Aug 13, 2015
- Semiconductor Components Industries, LLC
- William F. Burghout
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DIE SINGULATION METHOD
- Publication number 20140134828
- Publication date May 15, 2014
- Semiconductor Components Industries, LLC
- William F. Burghout
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DIE SINGULATION METHOD
- Publication number 20140051232
- Publication date Feb 20, 2014
- William F. Burghout
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC PACKAGE HAVING DOWN-SET LEADS AND METHOD
- Publication number 20100000772
- Publication date Jan 7, 2010
- Semiconductor Components Industries, LLC
- James P. Letterman, JR.
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A LEADED MOLDED ARRAY PACKAGE
- Publication number 20090298232
- Publication date Dec 3, 2009
- William F. Burghout
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming a leaded molded array package
- Publication number 20070111393
- Publication date May 17, 2007
- Semiconductor Components Industries, LLC.
- William F. Burghout
- H01 - BASIC ELECTRIC ELEMENTS

William F. Burghout

Person

Patents Grantslast 30 patents

Semiconductor die singulation method

Semiconductor die singulation method

Semiconductor die back layer separation method

Semiconductor die singulation method

Semiconductor die singulation method

Electronic package having down-set leads and method

Method of forming a leaded molded array package

Method of forming a leaded molded array package

Semiconductor package consisting of multiple conductive layers

Patents Applicationslast 30 patents

SEMICONDUCTOR DIE SINGULATION METHOD

SEMICONDUCTOR DIE SINGULATION METHOD

SEMICONDUCTOR DIE SINGULATION METHOD

SEMICONDUCTOR DIE SINGULATION METHOD

ELECTRONIC PACKAGE HAVING DOWN-SET LEADS AND METHOD

METHOD OF FORMING A LEADED MOLDED ARRAY PACKAGE

Method of forming a leaded molded array package