William H. Herndon

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Bias voltage distribution system
- Patent number 5,506,541
- Issue date Apr 9, 1996
- MicroUnity Systems Engineering, Inc.
- William H. Herndon
- G05 - CONTROLLING REGULATING
Information Patent Grant
Method of making a multi-layer to package
- Patent number 5,499,445
- Issue date Mar 19, 1996
- Intergraph Corporation
- Steven R. Boyle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-layered integrated circuit package with improved high frequen...
- Patent number 5,338,970
- Issue date Aug 16, 1994
- Intergraph Corporation
- Steven R. Boyle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
BiCMOS logic gate having plural linearly operated load FETs
- Patent number 5,283,479
- Issue date Feb 1, 1994
- MicroUnity Systems Engineering, Inc.
- Geert Rosseel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Bimos circuit that provides low power dissipation and high transien...
- Patent number 4,868,421
- Issue date Sep 19, 1989
- Fairchild Semiconductor Corporation
- William H. Herndon
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
BIPMOS decoder circuit
- Patent number 4,857,772
- Issue date Aug 15, 1989
- Fairchild Semiconductor Corporation
- William H. Herndon
- G11 - INFORMATION STORAGE
Information Patent Grant
Switched impedance emitter coupled logic gate
- Patent number 4,713,560
- Issue date Dec 15, 1987
- Fairchild Semiconductor Corporation
- William H. Herndon
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory cell power scavenging apparatus and method
- Patent number 4,627,034
- Issue date Dec 2, 1986
- Fairchild Camera and Instrument Corporation
- William H. Herndon
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit bipolar memory cell
- Patent number 4,622,575
- Issue date Nov 11, 1986
- Fairchild Semiconductor Corporation
- Madhukar B. Vora
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of making an integrated circuit bipolar memory cell
- Patent number 4,488,350
- Issue date Dec 18, 1984
- Fairchild Camera & Instrument Corp.
- Madhukar B. Vora
- G11 - INFORMATION STORAGE
Information Patent Grant
Bypass circuit for word line cell discharge current
- Patent number 4,488,263
- Issue date Dec 11, 1984
- Fairchild Camera & Instrument Corp.
- William H. Herndon
- G11 - INFORMATION STORAGE
Information Patent Grant
Synchronous sense amplifier
- Patent number 4,484,311
- Issue date Nov 20, 1984
- Fairchild Camera & Instrument Crop.
- William H. Herndon
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit line powered translinear memory cell
- Patent number 4,442,509
- Issue date Apr 10, 1984
- Fairchild Camera and Instrument Corporation
- William H. Herndon
- G11 - INFORMATION STORAGE
Information Patent Grant
Inverse transistor coupled memory cell
- Patent number 4,257,059
- Issue date Mar 17, 1981
- Fairchild Camera & Instrument Corp.
- William H. Herndon
- G11 - INFORMATION STORAGE
Information Patent Grant
Low voltage data retention bias circuitry for volatile memories
- Patent number 4,104,734
- Issue date Aug 1, 1978
- Fairchild Camera and Instrument Corporation
- William H. Herndon
- G11 - INFORMATION STORAGE
Information Patent Grant
An improved semiconductor memory cell circuit and structure
- Patent number 4,032,902
- Issue date Jun 28, 1977
- Fairchild Camera and Instrument Corporation
- William H. Herndon
- G11 - INFORMATION STORAGE

William H. Herndon

Person

Patents Grantslast 30 patents

Bias voltage distribution system

Method of making a multi-layer to package

Multi-layered integrated circuit package with improved high frequen...

BiCMOS logic gate having plural linearly operated load FETs

Bimos circuit that provides low power dissipation and high transien...

BIPMOS decoder circuit

Switched impedance emitter coupled logic gate

Memory cell power scavenging apparatus and method

Integrated circuit bipolar memory cell

Method of making an integrated circuit bipolar memory cell

Bypass circuit for word line cell discharge current

Synchronous sense amplifier

Bit line powered translinear memory cell

Inverse transistor coupled memory cell

Low voltage data retention bias circuitry for volatile memories

An improved semiconductor memory cell circuit and structure