William J. Clarke

Person

Poughkeepsie, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Built-in testing of unused element on chip
- Patent number 9,355,746
- Issue date May 31, 2016
- International Business Machines Corporation
- Luiz C. Alves
- G11 - INFORMATION STORAGE
Information Patent Grant
Soft error resilient FPGA
- Patent number 9,166,587
- Issue date Oct 20, 2015
- International Business Machines Corporation
- Luiz C. Alves
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Built-in testing of unused element on chip
- Patent number 9,136,019
- Issue date Sep 15, 2015
- International Business Machines Corporation
- Luiz C. Alves
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic graduated memory device protection in redundant array of in...
- Patent number 8,856,620
- Issue date Oct 7, 2014
- International Business Machines Corporation
- Patrick J. Meaney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic graduated memory device protection in redundant array of in...
- Patent number 8,843,806
- Issue date Sep 23, 2014
- International Business Machines Corporation
- Patrick J. Meaney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Soft error resilient FPGA
- Patent number 8,513,972
- Issue date Aug 20, 2013
- International Business Machines Corporation
- Luiz C. Alves
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for providing a high fault tolerant memory system
- Patent number 8,041,989
- Issue date Oct 18, 2011
- International Business Machines Corporation
- Luis A. Lastras-Montano
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for error correction and detection in a memory sy...
- Patent number 8,041,990
- Issue date Oct 18, 2011
- International Business Machines Corporation
- James A. O'Connor
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
BIT LINE ALIGNMENT FOR THE REDUCTION OF SOFT ERRORS
- Publication number 20240184971
- Publication date Jun 6, 2024
- International Business Machines Corporation
- K. Paul Muller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUILT-IN TESTING OF UNUSED ELEMENT ON CHIP
- Publication number 20150262711
- Publication date Sep 17, 2015
- International Business Machines Corporation
- Luiz C. Alves
- G11 - INFORMATION STORAGE
Information Patent Application
BUILT-IN TESTING OF UNUSED ELEMENT ON CHIP
- Publication number 20150262713
- Publication date Sep 17, 2015
- International Business Machines Corporation
- Luiz C. Alves
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC GRADUATED MEMORY DEVICE PROTECTION IN REDUNDANT ARRAY OF IN...
- Publication number 20140101518
- Publication date Apr 10, 2014
- International Business Machines Corporation
- Patrick J. Meaney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SOFT ERROR RESILIENT FPGA
- Publication number 20130265080
- Publication date Oct 10, 2013
- Luiz C. Alves
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DYNAMIC GRADUATED MEMORY DEVICE PROTECTION IN REDUNDANT ARRAY OF IN...
- Publication number 20130191703
- Publication date Jul 25, 2013
- International Business Machines Corporation
- Patrick J. Meaney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SOFT ERROR RESILIENT FPGA
- Publication number 20130181738
- Publication date Jul 18, 2013
- International Business Machines Corporation
- Luiz C. Alves
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEM AND METHOD FOR ERROR CORRECTION AND DETECTION IN A MEMORY SY...
- Publication number 20090006886
- Publication date Jan 1, 2009
- International Business Machines Corporation
- James A. O'Connor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR PROVIDING A HIGH FAULT TOLERANT MEMORY SYSTEM
- Publication number 20090006900
- Publication date Jan 1, 2009
- International Business Machines Corporation
- Luis A. Lastras-Montano
- G06 - COMPUTING CALCULATING COUNTING

William J. Clarke

Person

Patents Grantslast 30 patents

Built-in testing of unused element on chip

Soft error resilient FPGA

Built-in testing of unused element on chip

Dynamic graduated memory device protection in redundant array of in...

Dynamic graduated memory device protection in redundant array of in...

Soft error resilient FPGA

System and method for providing a high fault tolerant memory system

System and method for error correction and detection in a memory sy...

Patents Applicationslast 30 patents

BIT LINE ALIGNMENT FOR THE REDUCTION OF SOFT ERRORS

BUILT-IN TESTING OF UNUSED ELEMENT ON CHIP

BUILT-IN TESTING OF UNUSED ELEMENT ON CHIP

DYNAMIC GRADUATED MEMORY DEVICE PROTECTION IN REDUNDANT ARRAY OF IN...

SOFT ERROR RESILIENT FPGA

DYNAMIC GRADUATED MEMORY DEVICE PROTECTION IN REDUNDANT ARRAY OF IN...

SOFT ERROR RESILIENT FPGA

SYSTEM AND METHOD FOR ERROR CORRECTION AND DETECTION IN A MEMORY SY...

SYSTEM AND METHOD FOR PROVIDING A HIGH FAULT TOLERANT MEMORY SYSTEM