William Kurt Lewchuk

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Load/store unit having pre-cache and post-cache queues for low late...
- Patent number 6,473,832
- Issue date Oct 29, 2002
- Advanced Micro Devices, Inc.
- Hebbalalu S. Ramagopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer system including a novel address translation mechanism
- Patent number 6,446,189
- Issue date Sep 3, 2002
- Advanced Micro Devices, Inc.
- Gerald D. Zuraski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Minimizing use of bus command code points to request the start and...
- Patent number 6,430,639
- Issue date Aug 6, 2002
- Advanced Micro Devices, Inc.
- Derrick R. Meyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Minimizing self-modifying code checks for uncacheable memory types
- Patent number 6,415,360
- Issue date Jul 2, 2002
- Advanced Micro Devices, Inc.
- William Alexander Hughes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low latency error reporting for high performance bus
- Patent number 5,771,247
- Issue date Jun 23, 1998
- International Business Machines Corporation
- Michael Scott Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for communicating between devices
- Patent number 5,745,698
- Issue date Apr 28, 1998
- International Business Machines Corporation
- Michael Scott Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for allocating bus resources in a data processing...
- Patent number 5,687,327
- Issue date Nov 11, 1997
- International Business Machines Corporation
- Ravi Kumar Arimilli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Alternating data valid control signals for high performance data tr...
- Patent number 5,671,370
- Issue date Sep 23, 1997
- International Business Machines Corporation
- Michael Scott Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache coherency in a multiprocessing system
- Patent number 5,659,708
- Issue date Aug 19, 1997
- International Business Machines Corp.
- Ravi Kumar Arimilli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual latency status and coherency reporting for a multiprocessing s...
- Patent number 5,608,878
- Issue date Mar 4, 1997
- International Business Machines Corporation
- Ravi K. Arimilli
- G06 - COMPUTING CALCULATING COUNTING

William Kurt Lewchuk

Person

Patents Grantslast 30 patents

Load/store unit having pre-cache and post-cache queues for low late...

Computer system including a novel address translation mechanism

Minimizing use of bus command code points to request the start and...

Minimizing self-modifying code checks for uncacheable memory types

Low latency error reporting for high performance bus

System and method for communicating between devices

System and method for allocating bus resources in a data processing...

Alternating data valid control signals for high performance data tr...

Cache coherency in a multiprocessing system

Dual latency status and coherency reporting for a multiprocessing s...