William Macy

Person

Palto Alto, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Processor to execute shift right merge instructions
- Patent number 10,732,973
- Issue date Aug 4, 2020
- Intel Corporation
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
SIMD sign operation
- Patent number 10,474,466
- Issue date Nov 12, 2019
- Intel Corporation
- William W. Macy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for shuffling data
- Patent number 10,152,323
- Issue date Dec 11, 2018
- Intel Corporation
- Patrice L. Roussel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor to execute shift right merge instructions
- Patent number 10,146,541
- Issue date Dec 4, 2018
- Intel Corporation
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
SIMD sign operation
- Patent number 9,858,076
- Issue date Jan 2, 2018
- Intel Corporation
- William W. Macy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
SIMD sign operation
- Patent number 9,678,753
- Issue date Jun 13, 2017
- Intel Corporation
- William W. Macy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for shuffling data
- Patent number 9,477,472
- Issue date Oct 25, 2016
- Intel Corporation
- William W. Macy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
SIMD sign operation
- Patent number 9,329,862
- Issue date May 3, 2016
- Intel Corporation
- William W. Macy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for shuffling data
- Patent number 9,229,718
- Issue date Jan 5, 2016
- Intel Corporation
- William W. Macy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for shuffling data
- Patent number 9,229,719
- Issue date Jan 5, 2016
- Intel Corporation
- William W. Macy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor to execute shift right merge instructions
- Patent number 9,218,184
- Issue date Dec 22, 2015
- Intel Corporation
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bitstream buffer manipulation with a SIMD merge instruction
- Patent number 9,189,238
- Issue date Nov 17, 2015
- Intel Corporation
- Yen-Kuang Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bitstream buffer manipulation with a SIMD merge instruction
- Patent number 9,189,237
- Issue date Nov 17, 2015
- Intel Corporation
- Yen-Kuang Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bitstream buffer manipulation with a SIMD merge instruction
- Patent number 9,182,987
- Issue date Nov 10, 2015
- Intel Corporation
- Yen-Kuang Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bitstream buffer manipulation with a SIMD merge instruction
- Patent number 9,182,985
- Issue date Nov 10, 2015
- Intel Corporation
- Yen-Kuang Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bitstream buffer manipulation with a SIMD merge instruction
- Patent number 9,182,988
- Issue date Nov 10, 2015
- Intel Corporation
- Yen-Kuang Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bitstream buffer manipulation with a SIMD merge instruction
- Patent number 9,170,814
- Issue date Oct 27, 2015
- Intel Corporation
- Yen-Kuang Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bitstream buffer manipulation with a SIMD merge instruction
- Patent number 9,170,815
- Issue date Oct 27, 2015
- Intel Corporation
- Yen-Kuang Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bitstream buffer manipulation with a SIMD merge instruction
- Patent number 9,152,420
- Issue date Oct 6, 2015
- Intel Corporation
- Yen-Kuang Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor to execute shift right merge instructions
- Patent number 8,782,377
- Issue date Jul 15, 2014
- Intel Corporation
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor to execute shift right merge instructions
- Patent number 8,745,358
- Issue date Jun 3, 2014
- Intel Corporation
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for shuffling data
- Patent number 8,688,959
- Issue date Apr 1, 2014
- Intel Corporation
- William W. Macy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bitstream buffer manipulation with a SIMD merge instruction
- Patent number 8,510,355
- Issue date Aug 13, 2013
- Intel Corporation
- Yen-Kuang Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
SIMD sign operation
- Patent number 8,510,363
- Issue date Aug 13, 2013
- Intel Corporation
- William W. Macy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for memory bandwidth friendly sorting on multi-co...
- Patent number 8,463,820
- Issue date Jun 11, 2013
- Intel Corporation
- Jatin Chhugani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for efficient integer transform
- Patent number 8,346,838
- Issue date Jan 1, 2013
- Intel Corporation
- Eric Debes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast full search motion estimation with SIMD merge instruction
- Patent number 7,685,212
- Issue date Mar 23, 2010
- Intel Corporation
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for efficient integer transform
- Patent number 7,624,138
- Issue date Nov 24, 2009
- Intel Corporation
- Eric Debes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing multiply-add operations on pack...
- Patent number 7,430,578
- Issue date Sep 30, 2008
- Intel Corporation
- Eric Debes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing multiply-add operations on pack...
- Patent number 7,395,298
- Issue date Jul 1, 2008
- Intel Corporation
- Eric Debes
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
PROCESSOR TO EXECUTE SHIFT RIGHT MERGE INSTRUCTIONS
- Publication number 20190220280
- Publication date Jul 18, 2019
- Intel Corporation
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIMD SIGN OPERATION
- Publication number 20180121197
- Publication date May 3, 2018
- Intel Corporation
- William W. Macy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIMD SIGN OPERATION
- Publication number 20170109161
- Publication date Apr 20, 2017
- Intel Corporation
- William W. Macy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR SHUFFLING DATA
- Publication number 20170039066
- Publication date Feb 9, 2017
- lntel Corporation
- Patrice L. Roussel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIMD SIGN OPERATION
- Publication number 20160188332
- Publication date Jun 30, 2016
- Intel Corporation
- William W. Macy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR TO EXECUTE SHIFT RIGHT MERGE INSTRUCTIONS
- Publication number 20160070575
- Publication date Mar 10, 2016
- Intel Corporation
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR SHUFFLING DATA
- Publication number 20150154023
- Publication date Jun 4, 2015
- Intel Corporation
- William W. Macy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR SHUFFLING DATA
- Publication number 20150121039
- Publication date Apr 30, 2015
- Intel Corporation
- William W. Macy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor to Execute Shift Right Merge Instructions
- Publication number 20130212359
- Publication date Aug 15, 2013
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BITSTREAM BUFFER MANIPULATION WITH A SIMD MERGE INSTRUCTION
- Publication number 20130185541
- Publication date Jul 18, 2013
- YEN-KUANG CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Bitstream Buffer Manipulation With A SIMD Merge Instruction
- Publication number 20130159672
- Publication date Jun 20, 2013
- Yen-Kueng Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Bitstream Buffer Manipulation With A SIMD Merge Instruction
- Publication number 20130145125
- Publication date Jun 6, 2013
- Yen-Kueng Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Bitstream Buffer Manipulation With A SIMD Merge Instruction
- Publication number 20130145120
- Publication date Jun 6, 2013
- Yen-Kueng Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Bitstream Buffer Manipulation With A SIMD Merge Instruction
- Publication number 20130138917
- Publication date May 30, 2013
- Yen-Kueng Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Bitstream Buffer Manipulation With A SIMD Merge Instruction
- Publication number 20130124824
- Publication date May 16, 2013
- Yen-Kueng Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Bitstream Buffer Manipulation With A SIMD Merge Instruction
- Publication number 20130061025
- Publication date Mar 7, 2013
- Yen-Kueng Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Bitstream Buffer Manipulation With A SIMD Merge Instruction
- Publication number 20130061024
- Publication date Mar 7, 2013
- Yen-Kueng Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR TO EXECUTE SHIFT RIGHT MERGE INSTRUCTIONS
- Publication number 20130007417
- Publication date Jan 3, 2013
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR TO EXECUTE SHIFT RIGHT MERGE INSTRUCTIONS
- Publication number 20120233443
- Publication date Sep 13, 2012
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for memory bandwidth friendly sorting on multi-co...
- Publication number 20110066806
- Publication date Mar 17, 2011
- Jatin Chhugani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Efficient Integer Transform
- Publication number 20100011042
- Publication date Jan 14, 2010
- Eric Debes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Bitstream buffer manipulation with a SIMD merge instruction
- Publication number 20050108312
- Publication date May 19, 2005
- Yen-Kuang Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, apparatus, and instruction for performing a sign operation...
- Publication number 20040267858
- Publication date Dec 30, 2004
- William W. Macy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for efficient integer transform
- Publication number 20040210616
- Publication date Oct 21, 2004
- Eric Debes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Template for watermark decoder synchronization
- Publication number 20040170299
- Publication date Sep 2, 2004
- Intel Corporation
- William W. Macy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for computing matrix transformations
- Publication number 20040133617
- Publication date Jul 8, 2004
- Yen-Kuang Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Efficient multiplication of small matrices using SIMD registers
- Publication number 20040122887
- Publication date Jun 24, 2004
- William W. Macy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Matrix multiplication for cryptographic processing
- Publication number 20040120518
- Publication date Jun 24, 2004
- William W. Macy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus for performing multiply-add operations on pack...
- Publication number 20040117422
- Publication date Jun 17, 2004
- Eric Debes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Superior misaligned memory load and copy using merge hardware
- Publication number 20040098556
- Publication date May 20, 2004
- Mark J. Buxton
- G06 - COMPUTING CALCULATING COUNTING

William Macy

Person

Patents Grantslast 30 patents

Processor to execute shift right merge instructions

SIMD sign operation

Method and apparatus for shuffling data

Processor to execute shift right merge instructions

SIMD sign operation

SIMD sign operation

Method and apparatus for shuffling data

SIMD sign operation

Method and apparatus for shuffling data

Method and apparatus for shuffling data

Processor to execute shift right merge instructions

Bitstream buffer manipulation with a SIMD merge instruction

Bitstream buffer manipulation with a SIMD merge instruction

Bitstream buffer manipulation with a SIMD merge instruction

Bitstream buffer manipulation with a SIMD merge instruction

Bitstream buffer manipulation with a SIMD merge instruction

Bitstream buffer manipulation with a SIMD merge instruction

Bitstream buffer manipulation with a SIMD merge instruction

Bitstream buffer manipulation with a SIMD merge instruction

Processor to execute shift right merge instructions

Processor to execute shift right merge instructions

Method and apparatus for shuffling data

Bitstream buffer manipulation with a SIMD merge instruction

SIMD sign operation

System and method for memory bandwidth friendly sorting on multi-co...

Method and apparatus for efficient integer transform

Fast full search motion estimation with SIMD merge instruction

Method and apparatus for efficient integer transform

Method and apparatus for performing multiply-add operations on pack...

Method and apparatus for performing multiply-add operations on pack...

Patents Applicationslast 30 patents

PROCESSOR TO EXECUTE SHIFT RIGHT MERGE INSTRUCTIONS

SIMD SIGN OPERATION

SIMD SIGN OPERATION

METHOD AND APPARATUS FOR SHUFFLING DATA

SIMD SIGN OPERATION

PROCESSOR TO EXECUTE SHIFT RIGHT MERGE INSTRUCTIONS

METHOD AND APPARATUS FOR SHUFFLING DATA

METHOD AND APPARATUS FOR SHUFFLING DATA

Processor to Execute Shift Right Merge Instructions

BITSTREAM BUFFER MANIPULATION WITH A SIMD MERGE INSTRUCTION

Bitstream Buffer Manipulation With A SIMD Merge Instruction

Bitstream Buffer Manipulation With A SIMD Merge Instruction

Bitstream Buffer Manipulation With A SIMD Merge Instruction

Bitstream Buffer Manipulation With A SIMD Merge Instruction

Bitstream Buffer Manipulation With A SIMD Merge Instruction

Bitstream Buffer Manipulation With A SIMD Merge Instruction

Bitstream Buffer Manipulation With A SIMD Merge Instruction

PROCESSOR TO EXECUTE SHIFT RIGHT MERGE INSTRUCTIONS

PROCESSOR TO EXECUTE SHIFT RIGHT MERGE INSTRUCTIONS

System and method for memory bandwidth friendly sorting on multi-co...

Method and Apparatus for Efficient Integer Transform

Bitstream buffer manipulation with a SIMD merge instruction

Method, apparatus, and instruction for performing a sign operation...

Method and apparatus for efficient integer transform

Template for watermark decoder synchronization

Method and apparatus for computing matrix transformations

Efficient multiplication of small matrices using SIMD registers

Matrix multiplication for cryptographic processing

Method and apparatus for performing multiply-add operations on pack...

Superior misaligned memory load and copy using merge hardware