William Pierce Evans

Person

Catonsville, MD, US

People

Patents Grantslast 30 patents

Information Patent Grant
Time to digital converter with successive approximation architecture
- Patent number 9,285,778
- Issue date Mar 15, 2016
- Cadence Design Systems, Inc.
- William P. Evans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Metastability error detection and correction system and method for...
- Patent number 8,957,802
- Issue date Feb 17, 2015
- Cadence Design Systems, Inc.
- William Pierce Evans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Parallel analog to digital converter architecture with charge redis...
- Patent number 8,902,093
- Issue date Dec 2, 2014
- Cadence Design Systems, Inc.
- Adrian Luigi Leuciuc
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for level shifting signals with adjustably contro...
- Patent number 8,810,301
- Issue date Aug 19, 2014
- Cadence Design Systems, Inc.
- William Pierce Evans
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for adaptive timing control of successive approxi...
- Patent number 8,344,925
- Issue date Jan 1, 2013
- Cadence Design Systems, Inc.
- William Pierce Evans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
CMOS phase interpolation system
- Patent number 8,081,024
- Issue date Dec 20, 2011
- Cadence Design Systems, Inc.
- William Pierce Evans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dual loop clock recovery circuit
- Patent number 8,036,300
- Issue date Oct 11, 2011
- Rambus, Inc.
- William P. Evans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method for level translation in serial data interface
- Patent number 7,948,270
- Issue date May 24, 2011
- Cadence Design Systems, Inc.
- William Pierce Evans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Voltage interpolation in digital-to-analog signal conversion
- Patent number 7,773,013
- Issue date Aug 10, 2010
- Cadence Design Systems, Inc.
- Stephen Williams
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dual loop clock recovery circuit
- Patent number 7,587,012
- Issue date Sep 8, 2009
- Rambus, Inc.
- William P. Evans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
CDR-based clock synthesis
- Patent number 7,480,358
- Issue date Jan 20, 2009
- Infineon Technologies AG
- Hamid Partovi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Voltage interpolation in digital-to-analog signal conversion
- Patent number 7,417,572
- Issue date Aug 26, 2008
- Cadence Design Systems
- Stephen Williams
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock recovery circuit with second order digital filter
- Patent number 7,127,017
- Issue date Oct 24, 2006
- Rambus, Inc.
- William P. Evans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Output driver for an integrated circuit
- Patent number 6,664,814
- Issue date Dec 16, 2003
- Cadence Design Systems, Inc.
- William P. Evans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Clock recovery circuit
- Patent number 6,002,279
- Issue date Dec 14, 1999
- G2 Networks, Inc.
- William P. Evans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Distortion reduction circuit for analog to digital converter system
- Patent number 5,552,784
- Issue date Sep 3, 1996
- Northrop Grumman Corporation
- William P. Evans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Common bus multinode sensor system
- Patent number 5,084,868
- Issue date Jan 28, 1992
- Westinghouse Electric Corp.
- Thomas F. Kelly
- G08 - SIGNALLING
Information Patent Grant
Subranging analog-to-digital converter with digital error correction
- Patent number 4,903,023
- Issue date Feb 20, 1990
- Westinghouse Electric Corp.
- William P. Evans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
A/D converter system with error correction and calibration apparatu...
- Patent number 4,903,024
- Issue date Feb 20, 1990
- Westinghouse Electric Corp.
- William P. Evans
- G01 - MEASURING TESTING
Information Patent Grant
Architecture for high speed analog to digital converters
- Patent number 4,862,171
- Issue date Aug 29, 1989
- Westinghouse Electric Corp.
- William P. Evans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Common bus multinode sensor system
- Patent number 4,770,842
- Issue date Sep 13, 1988
- Westinghouse Electric Corp.
- Thomas F. Kelly
- G08 - SIGNALLING
Information Patent Grant
Harmonic distortion reduction technique for data acquistion
- Patent number 4,612,533
- Issue date Sep 16, 1986
- The United States of America as represented by the Secretary of the Air Force
- William P. Evans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Latching type comparator
- Patent number 4,506,171
- Issue date Mar 19, 1985
- Westinghouse Electric Corp.
- William P. Evans
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Dual loop clock recovery circuit
- Publication number 20090257542
- Publication date Oct 15, 2009
- Rambus, Inc.
- William P. Evans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Dual loop clock recovery circuit
- Publication number 20060034395
- Publication date Feb 16, 2006
- Rambus, Inc.
- William P. Evans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CDR-based clock synthesis
- Publication number 20050193301
- Publication date Sep 1, 2005
- Hamid Partovi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

William Pierce Evans

Person

Patents Grantslast 30 patents

Time to digital converter with successive approximation architecture

Metastability error detection and correction system and method for...

Parallel analog to digital converter architecture with charge redis...

System and method for level shifting signals with adjustably contro...

System and method for adaptive timing control of successive approxi...

CMOS phase interpolation system

Dual loop clock recovery circuit

System and method for level translation in serial data interface

Voltage interpolation in digital-to-analog signal conversion

Dual loop clock recovery circuit

CDR-based clock synthesis

Voltage interpolation in digital-to-analog signal conversion

Clock recovery circuit with second order digital filter

Output driver for an integrated circuit

Clock recovery circuit

Distortion reduction circuit for analog to digital converter system

Common bus multinode sensor system

Subranging analog-to-digital converter with digital error correction

A/D converter system with error correction and calibration apparatu...

Architecture for high speed analog to digital converters

Common bus multinode sensor system

Harmonic distortion reduction technique for data acquistion

Latching type comparator

Patents Applicationslast 30 patents

Dual loop clock recovery circuit

Dual loop clock recovery circuit

CDR-based clock synthesis