William R. J. Corbin

Person

Underhill, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory array repair where repair logic cannot operate at same opera...
- Patent number 7,478,291
- Issue date Jan 13, 2009
- International Business Machines Corporation
- William R. J. Corbin
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array repair where repair logic cannot operate at same opera...
- Patent number 7,395,465
- Issue date Jul 1, 2008
- International Business Machines Corporation
- William R. J. Corbin
- G11 - INFORMATION STORAGE
Information Patent Grant
Design structure for memory array repair where repair logic cannot...
- Patent number 7,383,475
- Issue date Jun 3, 2008
- International Business Machines Corporation
- William R. J. Corbin
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for testing embedded DRAM arrays
- Patent number 7,237,165
- Issue date Jun 26, 2007
- International Business Machines Corporation
- Laura S. Chadwick
- G11 - INFORMATION STORAGE
Information Patent Grant
Testing logic and embedded memory in parallel
- Patent number 7,103,814
- Issue date Sep 5, 2006
- International Business Machines Corporation
- William R. Corbin
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for testing embedded DRAM arrays
- Patent number 7,073,100
- Issue date Jul 4, 2006
- International Business Machines Corporation
- Laura S. Chadwick
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for guaranteeing a minimum data strobe valid window and a mi...
- Patent number 6,708,298
- Issue date Mar 16, 2004
- International Business Machines Corporation
- William E. Corbin
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for testing and guaranteeing that skew between two signals m...
- Patent number 6,658,604
- Issue date Dec 2, 2003
- International Business Machines Corporation
- William R. Corbin
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY ARRAY REPAIR WHERE REPAIR LOGIC CANNOT OPERATE AT SAME OPERA...
- Publication number 20080209256
- Publication date Aug 28, 2008
- William R. J. Corbin
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ARRAY REPAIR WHERE REPAIR LOGIC CANNOT OPERATE AT SAME OPERA...
- Publication number 20060101305
- Publication date May 11, 2006
- William R.J. Corbin
- G11 - INFORMATION STORAGE
Information Patent Application
Method for testing embedded DRAM arrays
- Publication number 20050088888
- Publication date Apr 28, 2005
- Laura S. Chadwick
- G11 - INFORMATION STORAGE
Information Patent Application
Method for testing embedded DRAM arrays
- Publication number 20040093539
- Publication date May 13, 2004
- International Business Machines Corporation
- Laura S. Chadwick
- G11 - INFORMATION STORAGE
Information Patent Application
Testing logic and embedded memory in parallel
- Publication number 20040083412
- Publication date Apr 29, 2004
- International Business Machines Corporation
- William R. Corbin
- G01 - MEASURING TESTING
Information Patent Application
Method for guaranteeing a minimum data strobe valid window and a mi...
- Publication number 20020099987
- Publication date Jul 25, 2002
- International Business Machines Corporation
- William R. Corbin
- G11 - INFORMATION STORAGE

William R. J. Corbin

Person

Patents Grantslast 30 patents

Memory array repair where repair logic cannot operate at same opera...

Memory array repair where repair logic cannot operate at same opera...

Design structure for memory array repair where repair logic cannot...

Method for testing embedded DRAM arrays

Testing logic and embedded memory in parallel

Method for testing embedded DRAM arrays

Method for guaranteeing a minimum data strobe valid window and a mi...

Method for testing and guaranteeing that skew between two signals m...

Patents Applicationslast 30 patents

MEMORY ARRAY REPAIR WHERE REPAIR LOGIC CANNOT OPERATE AT SAME OPERA...

MEMORY ARRAY REPAIR WHERE REPAIR LOGIC CANNOT OPERATE AT SAME OPERA...

Method for testing embedded DRAM arrays

Method for testing embedded DRAM arrays

Testing logic and embedded memory in parallel

Method for guaranteeing a minimum data strobe valid window and a mi...