William S. Burton

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Fort Collins, CO, US

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Patents Grantslast 30 patents

Information Patent Grant
Method of fabricating the routing of electrical signals
- Patent number 7,405,109
- Issue date Jul 29, 2008
- Avago Technologies General IP Pte. Ltd.
- William S Burton
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Stripline structure with multiple ground vias separated by no more...
- Patent number 7,224,249
- Issue date May 29, 2007
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Minh van Quach
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Apparatus for routing electrical signals
- Patent number 6,900,533
- Issue date May 31, 2005
- Agilent Technologies, Inc.
- William S Burton
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
High-performance laminate for integrated circuit interconnection
- Patent number 6,630,628
- Issue date Oct 7, 2003
- Agilent Technologies, Inc.
- Nurwati S Devnani
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Patents Applicationslast 30 patents

Information Patent Application
Stripline structure
- Publication number 20070052503
- Publication date Mar 8, 2007
- Minh van Quach
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Apparatus and method for routing electrical signals
- Publication number 20050103523
- Publication date May 19, 2005
- William S. Burton
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
HIGH-PERFORMANCE LAMINATE FOR INTEGRATED CIRCUIT INTERCONNECTION
- Publication number 20030148077
- Publication date Aug 7, 2003
- Nurwati S. Devnani
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Apparatus and method for routing electrical signals
- Publication number 20030141107
- Publication date Jul 31, 2003
- William S. Burton
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR