William V. Huott

Person

Holmes, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
System testing using partitioned and controlled noise
- Patent number 12,174,251
- Issue date Dec 24, 2024
- International Business Machines Corporation
- Mary P. Kusko
- G01 - MEASURING TESTING
Information Patent Grant
Method to limit the time a semiconductor device operates above a ma...
- Patent number 11,817,697
- Issue date Nov 14, 2023
- International Business Machines Corporation
- Adam Benjamin Collura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Testing bit write operation to a memory array in integrated circuits
- Patent number 11,657,887
- Issue date May 23, 2023
- International Business Machines Corporation
- Thomas J. Knips
- G11 - INFORMATION STORAGE
Information Patent Grant
Microchip level shared array repair
- Patent number 11,462,295
- Issue date Oct 4, 2022
- International Business Machines Corporation
- Timothy Meehan
- G11 - INFORMATION STORAGE
Information Patent Grant
Tunable power save loop for processor chips
- Patent number 11,169,841
- Issue date Nov 9, 2021
- Internationl Business Machines Corporation
- K Paul Muller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Built-in self-test for bit-write enabled memory arrays
- Patent number 10,998,075
- Issue date May 4, 2021
- International Business Machines Corporation
- William Huott
- G11 - INFORMATION STORAGE
Information Patent Grant
Sequential error capture during memory test
- Patent number 10,971,242
- Issue date Apr 6, 2021
- International Business Machines Corporation
- William Huott
- G11 - INFORMATION STORAGE
Information Patent Grant
Implementing dynamic SEU detection and correction method and circuit
- Patent number 10,949,295
- Issue date Mar 16, 2021
- International Business Machines Corporation
- William V. Huott
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Granular variable impedance tuning
- Patent number 10,897,239
- Issue date Jan 19, 2021
- International Business Machines Corporation
- Anuwat Saetow
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Implementing SEU detection method and circuit
- Patent number 10,896,081
- Issue date Jan 19, 2021
- International Business Machines Corporation
- David D. Cadigan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power saving scannable latch output driver
- Patent number 10,890,623
- Issue date Jan 12, 2021
- International Business Machines Corporation
- William Huott
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory device command-address-control calibration
- Patent number 10,585,672
- Issue date Mar 10, 2020
- International Business Machines Corporation
- David D. Cadigan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physically aware scan diagnostic logic and power saving circuit ins...
- Patent number 10,371,747
- Issue date Aug 6, 2019
- International Business Machines Corporation
- William V. Huott
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
SRAM margin recovery during burn-in
- Patent number 10,373,678
- Issue date Aug 6, 2019
- International Business Machines Corporation
- William V. Huott
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM margin recovery during burn-in
- Patent number 10,332,591
- Issue date Jun 25, 2019
- International Business Machines Corporation
- William V. Huott
- G11 - INFORMATION STORAGE
Information Patent Grant
Mitigation of side effects of simultaneous switching of input/outpu...
- Patent number 10,324,879
- Issue date Jun 18, 2019
- International Business Machines Corporation
- David D. Cadigan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
SRAM bitline equalization using phase change material
- Patent number 10,229,738
- Issue date Mar 12, 2019
- International Business Machines Corporation
- David D. Cadigan
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM margin recovery during burn-in
- Patent number 10,163,493
- Issue date Dec 25, 2018
- International Business Machines Corporation
- William V. Huott
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM bitline equalization using phase change material
- Patent number 10,157,672
- Issue date Dec 18, 2018
- International Business Machines Corporation
- David D. Cadigan
- G11 - INFORMATION STORAGE
Information Patent Grant
Physically aware test patterns in semiconductor fabrication
- Patent number 10,061,886
- Issue date Aug 28, 2018
- International Business Machines Corporation
- William V. Huott
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partition-able storage of test results using inactive storage elements
- Patent number 9,983,261
- Issue date May 29, 2018
- International Business Machines Corporation
- William V. Huott
- G01 - MEASURING TESTING
Information Patent Grant
Physically aware test patterns in semiconductor fabrication
- Patent number 9,922,163
- Issue date Mar 20, 2018
- International Business Machines Corporation
- William V. Huott
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voltage rail monitoring to detect electromigration
- Patent number 9,857,416
- Issue date Jan 2, 2018
- International Business Machines Corporation
- David D. Cadigan
- G01 - MEASURING TESTING
Information Patent Grant
Initializing scannable and non-scannable latches from a common cloc...
- Patent number 9,762,212
- Issue date Sep 12, 2017
- International Business Machines Corporation
- William V. Huott
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Initializing scannable and non-scannable latches from a common cloc...
- Patent number 9,762,213
- Issue date Sep 12, 2017
- International Business Machines Corporation
- William V. Huott
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Voltage rail monitoring to detect electromigration
- Patent number 9,753,076
- Issue date Sep 5, 2017
- International Business Machines Corporation
- David D. Cadigan
- G01 - MEASURING TESTING
Information Patent Grant
Collecting diagnostic data from chips
- Patent number 9,746,516
- Issue date Aug 29, 2017
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Grant
Multi-match error detection in content addressable memory testing
- Patent number 9,697,910
- Issue date Jul 4, 2017
- International Business Machines Corporation
- William V. Huott
- G11 - INFORMATION STORAGE
Information Patent Grant
Shift register with opposite shift data and shift clock directions
- Patent number 9,627,012
- Issue date Apr 18, 2017
- International Business Machines Corporation
- William V. Huott
- G11 - INFORMATION STORAGE
Information Patent Grant
Physically aware insertion of diagnostic circuit elements
- Patent number 9,557,381
- Issue date Jan 31, 2017
- International Business Machines Corporation
- William V. Huott
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
WORKLOAD AWARE EXERCISER DEVICE PLACEMENT
- Publication number 20240086608
- Publication date Mar 14, 2024
- International Business Machines Corporation
- Michael Romain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD TO LIMIT THE TIME A SEMICONDUCTOR DEVICE OPERATES ABOVE A MA...
- Publication number 20230318286
- Publication date Oct 5, 2023
- International Business Machines Corporation
- Adam Benjamin COLLURA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM TESTING USING PARTITIONED AND CONTROLLED NOISE
- Publication number 20230094107
- Publication date Mar 30, 2023
- International Business Machines Corporation
- Mary P. Kusko
- G01 - MEASURING TESTING
Information Patent Application
TESTING BIT WRITE OPERATION TO A MEMORY ARRAY IN INTEGRATED CIRCUITS
- Publication number 20230089274
- Publication date Mar 23, 2023
- International Business Machines Corporation
- Thomas J. KNIPS
- G11 - INFORMATION STORAGE
Information Patent Application
MICROCHIP LEVEL SHARED ARRAY REPAIR
- Publication number 20210319845
- Publication date Oct 14, 2021
- International Business Machines Corporation
- Timothy MEEHAN
- G11 - INFORMATION STORAGE
Information Patent Application
TUNABLE POWER SAVE LOOP FOR PROCESSOR CHIPS
- Publication number 20210294640
- Publication date Sep 23, 2021
- International Business Machines Corporation
- K Paul Muller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEQUENTIAL ERROR CAPTURE DURING MEMORY TEST
- Publication number 20210074375
- Publication date Mar 11, 2021
- International Business Machines Corporation
- William Huott
- G11 - INFORMATION STORAGE
Information Patent Application
BUILT-IN SELF-TEST FOR BIT-WRITE ENABLED MEMORY ARRAYS
- Publication number 20210074376
- Publication date Mar 11, 2021
- International Business Machines Corporation
- William Huott
- G11 - INFORMATION STORAGE
Information Patent Application
IMPLEMENTING DYNAMIC SEU DETECTON AND CORRECTION METHOD AND CIRCUIT
- Publication number 20200192751
- Publication date Jun 18, 2020
- International Business Machines Corporation
- William V. Huott
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMPLEMENTING SEU DETECTION METHOD AND CIRCUIT
- Publication number 20200192739
- Publication date Jun 18, 2020
- International Business Machines Corporation
- David D. Cadigan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SRAM MARGIN RECOVERY DURING BURN-IN
- Publication number 20180322915
- Publication date Nov 8, 2018
- International Business Machines Corporation
- William V. Huott
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM MARGIN RECOVERY DURING BURN-IN
- Publication number 20180322916
- Publication date Nov 8, 2018
- International Business Machines Corporation
- William V. Huott
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM MARGIN RECOVERY DURING BURN-IN
- Publication number 20180322917
- Publication date Nov 8, 2018
- International Business Machines Corporation
- William V. Huott
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM BITLINE EQUALIZATION USING PHASE CHANGE MATERIAL
- Publication number 20180308544
- Publication date Oct 25, 2018
- International Business Machines Corporation
- David D. Cadigan
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM BITLINE EQUALIZATION USING PHASE CHANGE MATERIAL
- Publication number 20180308545
- Publication date Oct 25, 2018
- International Business Machines Corporation
- David D. Cadigan
- G11 - INFORMATION STORAGE
Information Patent Application
PHYSICALLY AWARE TEST PATTERNS IN SEMICONDUCTOR FABRICATION
- Publication number 20180101638
- Publication date Apr 12, 2018
- International Business Machines Corporation
- William V. Huott
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MITIGATION OF SIDE EFFECTS OF SIMULTANEOUS SWITCHING OF INPUT/OUTPU...
- Publication number 20180089126
- Publication date Mar 29, 2018
- International Business Machines Corporation
- David D. Cadigan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Voltage Rail Monitoring to Detect Electromigration
- Publication number 20180074109
- Publication date Mar 15, 2018
- International Business Machines Corporation
- David D. Cadigan
- G01 - MEASURING TESTING
Information Patent Application
PHYSICALLY AWARE TEST PATTERNS IN SEMICONDUCTOR FABRICATION
- Publication number 20180011962
- Publication date Jan 11, 2018
- International Business Machines Corporation
- William V. Huott
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARTITION-ABLE STORAGE OF TEST RESULTS USING INACTIVE STORAGE ELEMENTS
- Publication number 20170350940
- Publication date Dec 7, 2017
- International Business Machines Corporation
- William V. Huott
- G01 - MEASURING TESTING
Information Patent Application
MEMORY DEVICE COMMAND-ADDRESS-CONTROL CALIBRATION
- Publication number 20170300338
- Publication date Oct 19, 2017
- International Business Machines Corporation
- David D. Cadigan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PHYSICALLY AWARE SCAN DIAGNOSTIC LOGIC AND POWER SAVING CIRCUIT INS...
- Publication number 20170254851
- Publication date Sep 7, 2017
- International Business Machines Corporation
- WILLIAM V. HUOTT
- G01 - MEASURING TESTING
Information Patent Application
PHYSICALLY AWARE SCAN DIAGNOSTIC LOGIC AND POWER SAVING CIRCUIT INS...
- Publication number 20170254850
- Publication date Sep 7, 2017
- International Business Machines Corporation
- WILLIAM V. HUOTT
- G01 - MEASURING TESTING
Information Patent Application
Voltage Rail Monitoring to Detect Electromigration
- Publication number 20170219648
- Publication date Aug 3, 2017
- International Business Machines Corporation
- David D. Cadigan
- G01 - MEASURING TESTING
Information Patent Application
Voltage Rail Monitoring to Detect Electromigration
- Publication number 20170219645
- Publication date Aug 3, 2017
- International Business Machines Corporation
- David D. Cadigan
- G01 - MEASURING TESTING
Information Patent Application
COLLECTING DIAGNOSTIC DATA FROM CHIPS
- Publication number 20160238656
- Publication date Aug 18, 2016
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Application
BUILT-IN TESTING OF UNUSED ELEMENT ON CHIP
- Publication number 20150262711
- Publication date Sep 17, 2015
- International Business Machines Corporation
- Luiz C. Alves
- G11 - INFORMATION STORAGE
Information Patent Application
BUILT-IN TESTING OF UNUSED ELEMENT ON CHIP
- Publication number 20150262713
- Publication date Sep 17, 2015
- International Business Machines Corporation
- Luiz C. Alves
- G11 - INFORMATION STORAGE
Information Patent Application
COLLECTING DIAGNOSTIC DATA FROM CHIPS
- Publication number 20150168491
- Publication date Jun 18, 2015
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Application
MANAGING CHIP TESTING DATA
- Publication number 20150168490
- Publication date Jun 18, 2015
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING

William V. Huott

Person

Patents Grantslast 30 patents

System testing using partitioned and controlled noise

Method to limit the time a semiconductor device operates above a ma...

Testing bit write operation to a memory array in integrated circuits

Microchip level shared array repair

Tunable power save loop for processor chips

Built-in self-test for bit-write enabled memory arrays

Sequential error capture during memory test

Implementing dynamic SEU detection and correction method and circuit

Granular variable impedance tuning

Implementing SEU detection method and circuit

Power saving scannable latch output driver

Memory device command-address-control calibration

Physically aware scan diagnostic logic and power saving circuit ins...

SRAM margin recovery during burn-in

SRAM margin recovery during burn-in

Mitigation of side effects of simultaneous switching of input/outpu...

SRAM bitline equalization using phase change material

SRAM margin recovery during burn-in

SRAM bitline equalization using phase change material

Physically aware test patterns in semiconductor fabrication

Partition-able storage of test results using inactive storage elements

Physically aware test patterns in semiconductor fabrication

Voltage rail monitoring to detect electromigration

Initializing scannable and non-scannable latches from a common cloc...

Initializing scannable and non-scannable latches from a common cloc...

Voltage rail monitoring to detect electromigration

Collecting diagnostic data from chips

Multi-match error detection in content addressable memory testing

Shift register with opposite shift data and shift clock directions

Physically aware insertion of diagnostic circuit elements

Patents Applicationslast 30 patents

WORKLOAD AWARE EXERCISER DEVICE PLACEMENT

METHOD TO LIMIT THE TIME A SEMICONDUCTOR DEVICE OPERATES ABOVE A MA...

SYSTEM TESTING USING PARTITIONED AND CONTROLLED NOISE

TESTING BIT WRITE OPERATION TO A MEMORY ARRAY IN INTEGRATED CIRCUITS

MICROCHIP LEVEL SHARED ARRAY REPAIR

TUNABLE POWER SAVE LOOP FOR PROCESSOR CHIPS

SEQUENTIAL ERROR CAPTURE DURING MEMORY TEST

BUILT-IN SELF-TEST FOR BIT-WRITE ENABLED MEMORY ARRAYS

IMPLEMENTING DYNAMIC SEU DETECTON AND CORRECTION METHOD AND CIRCUIT

IMPLEMENTING SEU DETECTION METHOD AND CIRCUIT

SRAM MARGIN RECOVERY DURING BURN-IN

SRAM MARGIN RECOVERY DURING BURN-IN

SRAM MARGIN RECOVERY DURING BURN-IN

SRAM BITLINE EQUALIZATION USING PHASE CHANGE MATERIAL

SRAM BITLINE EQUALIZATION USING PHASE CHANGE MATERIAL

PHYSICALLY AWARE TEST PATTERNS IN SEMICONDUCTOR FABRICATION

MITIGATION OF SIDE EFFECTS OF SIMULTANEOUS SWITCHING OF INPUT/OUTPU...

Voltage Rail Monitoring to Detect Electromigration

PHYSICALLY AWARE TEST PATTERNS IN SEMICONDUCTOR FABRICATION

PARTITION-ABLE STORAGE OF TEST RESULTS USING INACTIVE STORAGE ELEMENTS

MEMORY DEVICE COMMAND-ADDRESS-CONTROL CALIBRATION

PHYSICALLY AWARE SCAN DIAGNOSTIC LOGIC AND POWER SAVING CIRCUIT INS...

PHYSICALLY AWARE SCAN DIAGNOSTIC LOGIC AND POWER SAVING CIRCUIT INS...

Voltage Rail Monitoring to Detect Electromigration

Voltage Rail Monitoring to Detect Electromigration

COLLECTING DIAGNOSTIC DATA FROM CHIPS

BUILT-IN TESTING OF UNUSED ELEMENT ON CHIP

BUILT-IN TESTING OF UNUSED ELEMENT ON CHIP

COLLECTING DIAGNOSTIC DATA FROM CHIPS

MANAGING CHIP TESTING DATA