Wilson Y. Liao

Person

Belmont, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multiple multi-threaded processors having an L1 instruction cache a...
- Patent number 8,087,024
- Issue date Dec 27, 2011
- Intel Corporation
- Sridhar Lakshmanamurthy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Thread-based engine cache partitioning
- Patent number 7,536,692
- Issue date May 19, 2009
- Intel Corporation
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing element with next and previous neighbor registers for di...
- Patent number 7,275,145
- Issue date Sep 25, 2007
- Intel Corporation
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Multiple multi-threaded processors having an L1 instruction cache a...
- Publication number 20090089546
- Publication date Apr 2, 2009
- Intel Corporation
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processing element with next and previous neighbor registers
- Publication number 20050149691
- Publication date Jul 7, 2005
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Servicing engine cache requests
- Publication number 20050108479
- Publication date May 19, 2005
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Thread-based engine cache partitioning
- Publication number 20050102486
- Publication date May 12, 2005
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamically caching engine instructions
- Publication number 20050102474
- Publication date May 12, 2005
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scalable packet buffer descriptor management in ATM to ethernet bri...
- Publication number 20050068956
- Publication date Mar 31, 2005
- Intel Corporation, A DELAWARE CORPORATION
- Wilson Y. Liao
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Executing instructions on a processor
- Publication number 20050050306
- Publication date Mar 3, 2005
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and process for scheduling data packet collection
- Publication number 20040252687
- Publication date Dec 16, 2004
- Sridhar Lakshmanamurthy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Wilson Y. Liao

Person

Patents Grantslast 30 patents

Multiple multi-threaded processors having an L1 instruction cache a...

Thread-based engine cache partitioning

Processing element with next and previous neighbor registers for di...

Patents Applicationslast 30 patents

Multiple multi-threaded processors having an L1 instruction cache a...

Processing element with next and previous neighbor registers

Servicing engine cache requests

Thread-based engine cache partitioning

Dynamically caching engine instructions

Scalable packet buffer descriptor management in ATM to ethernet bri...

Executing instructions on a processor

Method and process for scheduling data packet collection