Wing N. Toy

Person

Glen Ellyn, IL, US

People

Patents Grantslast 30 patents

Information Patent Grant
Packet switching network for multiple packet types
- Patent number 5,001,702
- Issue date Mar 19, 1991
- AT&T Bell Laboratories
- Kari T. Teraslinna
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Broadcast packet switch network
- Patent number 4,991,171
- Issue date Feb 5, 1991
- AT&T Bell Laboratories
- Kari T. Teraslinna
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Call waiting arrangement providing options to both a subsequent cal...
- Patent number 4,947,421
- Issue date Aug 7, 1990
- AT&T Bell Laboratories
- Liane C. Toy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Packet switching network with multiple packet destinations
- Patent number 4,701,906
- Issue date Oct 20, 1987
- American Telephone and Telegraph Company, AT&T Bell Laboratories
- Maurice N. Ransom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Idle period signalling in a packet switching system
- Patent number 4,646,287
- Issue date Feb 24, 1987
- AT&T Bell Laboratories
- Mikiel L. Larson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Self-routing multipath packet switching network with sequential del...
- Patent number 4,630,260
- Issue date Dec 16, 1986
- AT&T Bell Laboratories
- Wing N. Toy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Lockup detection and recovery in a packet switching network
- Patent number 4,630,259
- Issue date Dec 16, 1986
- AT&T Bell Laboratories
- Mikiel L. Larson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Traffic load control arrangement and method for a packet switching...
- Patent number 4,611,322
- Issue date Sep 9, 1986
- AT&T Bell Laboratories
- Mikiel L. Larson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multiplexed interconnection of packet switching node packages
- Patent number 4,577,308
- Issue date Mar 18, 1986
- AT&T Bell Laboratories
- Mikiel L. Larson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache arrangement for direct memory access block transfer
- Patent number 4,504,902
- Issue date Mar 12, 1985
- AT&T Bell Laboratories
- Lee E. Gallaher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache addressing arrangement in a computer system
- Patent number 4,400,774
- Issue date Aug 23, 1983
- Bell Telephone Laboratories, Incorporated
- Wing N. Toy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer with dual vat buffers for accessing a common memory shared...
- Patent number 4,386,402
- Issue date May 31, 1983
- Bell Telephone Laboratories, Incorporated
- Wing N. Toy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Self-checking arithmetic unit
- Patent number 4,314,350
- Issue date Feb 2, 1982
- Bell Telephone Laboratories, Incorporated
- Wing N. Toy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing system including a cache memory
- Patent number 4,197,580
- Issue date Apr 8, 1980
- Bell Telephone Laboratories, Incorporated
- Shih-jeh Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory organization to distribute power dissipation and to allow si...
- Patent number 4,164,041
- Issue date Aug 7, 1979
- Bell Telephone Laboratories, Incorporated
- Walter T. Hartwell
- G06 - COMPUTING CALCULATING COUNTING

Wing N. Toy

Person

Patents Grantslast 30 patents

Packet switching network for multiple packet types

Broadcast packet switch network

Call waiting arrangement providing options to both a subsequent cal...

Packet switching network with multiple packet destinations

Idle period signalling in a packet switching system

Self-routing multipath packet switching network with sequential del...

Lockup detection and recovery in a packet switching network

Traffic load control arrangement and method for a packet switching...

Multiplexed interconnection of packet switching node packages

Cache arrangement for direct memory access block transfer

Cache addressing arrangement in a computer system

Computer with dual vat buffers for accessing a common memory shared...

Self-checking arithmetic unit

Data processing system including a cache memory

Memory organization to distribute power dissipation and to allow si...