Winston K. M. Lee

Person

South San Francisco, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory array with read/write methods
- Patent number 6,754,746
- Issue date Jun 22, 2004
- Monolithic System Technology, Inc.
- Wingyu Leung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic address mapping and redundancy in a modular memory device
- Patent number 6,393,504
- Issue date May 21, 2002
- Monolithic System Technology, Inc.
- Wingyu Leung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing system with master and slave devices and asymmetric...
- Patent number 6,272,577
- Issue date Aug 7, 2001
- Monolithic System Technology, Inc.
- Wingyu Leung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Resynchronization circuit for circuit module architecture
- Patent number 5,737,587
- Issue date Apr 7, 1998
- Monolithic System Technology, Inc.
- Wingyu Leung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Termination circuits for reduced swing signal lines and methods for...
- Patent number 5,729,152
- Issue date Mar 17, 1998
- Monolithic System Technology, Inc.
- Wingyu Leung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Latent defect handling in EEPROM devices
- Patent number 5,659,550
- Issue date Aug 19, 1997
- SanDisk Corporation
- Sanjay Mehrotra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Resynchronization circuit for a memory system and method of operati...
- Patent number 5,655,113
- Issue date Aug 5, 1997
- Monolithic System Technology, Inc.
- Wingyu Leung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reduced CMOS-swing clamping circuit for bus lines
- Patent number 5,498,990
- Issue date Mar 12, 1996
- Monolithic System Technology, Inc.
- Wingyu Leung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and circuitry for minimizing clock-data skew in a bus system
- Patent number 5,432,823
- Issue date Jul 11, 1995
- Rambus, Inc.
- James A. Gasbarro
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Latent defect handling in EEPROM devices
- Patent number 5,428,621
- Issue date Jun 27, 1995
- SunDisk Corporation
- Sanjay Mehrotra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High speed bus system
- Patent number 5,355,391
- Issue date Oct 11, 1994
- Rambus, Inc.
- Mark A. Horowitz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-state EEprom read and write circuits and techniques
- Patent number 5,172,338
- Issue date Dec 15, 1992
- SunDisk Corporation
- Sanjay Mehrotra
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-state EEprom read and write circuits and techniques
- Patent number 5,163,021
- Issue date Nov 10, 1992
- SunDisk Corporation
- Sanjay Mehrotra
- G11 - INFORMATION STORAGE
Information Patent Grant
TTL to CMOS logic level translator
- Patent number 4,916,337
- Issue date Apr 10, 1990
- Integrated Device Technology, Inc.
- Wingyu Leung
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Self-limiting erase scheme for EEPROM
- Patent number 4,797,856
- Issue date Jan 10, 1989
- Intel Corporation
- Winston K. M. Lee
- G11 - INFORMATION STORAGE

Winston K. M. Lee

Person

Patents Grantslast 30 patents

Memory array with read/write methods

Dynamic address mapping and redundancy in a modular memory device

Data processing system with master and slave devices and asymmetric...

Resynchronization circuit for circuit module architecture

Termination circuits for reduced swing signal lines and methods for...

Latent defect handling in EEPROM devices

Resynchronization circuit for a memory system and method of operati...

Reduced CMOS-swing clamping circuit for bus lines

Method and circuitry for minimizing clock-data skew in a bus system

Latent defect handling in EEPROM devices

High speed bus system

Multi-state EEprom read and write circuits and techniques

Multi-state EEprom read and write circuits and techniques

TTL to CMOS logic level translator

Self-limiting erase scheme for EEPROM