Winston Lee

Person

Palo Alto, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Permutated ring network
- Patent number 11,196,587
- Issue date Dec 7, 2021
- DeGirum Corporation
- Kit S. Tam
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods and systems for packaging an integrated circuit
- Patent number 10,896,900
- Issue date Jan 19, 2021
- Marvell Asia Pte, Ltd.
- Runzi Chang
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
System and methods for completing a cascaded clock ring bus
- Patent number 10,884,451
- Issue date Jan 5, 2021
- DeGirum Corporation
- Winston Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for fabricating IC chips with tilted patterning
- Patent number 10,854,455
- Issue date Dec 1, 2020
- Marvell Asia Pte, Ltd.
- Runzi Chang
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
MRAM structure for efficient manufacturability
- Patent number 10,707,411
- Issue date Jul 7, 2020
- Marvell International Ltd.
- Zining Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabricating memory devices with optimized gate oxide thickness
- Patent number 10,600,793
- Issue date Mar 24, 2020
- Marvell World Trade Ltd.
- Runzi Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for asynchronous, multiple clock domain data stre...
- Patent number 10,476,656
- Issue date Nov 12, 2019
- DeGirum Corporation
- Winston Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods and systems for packaging semiconductor devices to improve...
- Patent number 10,431,574
- Issue date Oct 1, 2019
- Marvell World Trade Ltd.
- Runzi Chang
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Fabricating memory devices with optimized gate oxide thickness
- Patent number 10,319,727
- Issue date Jun 11, 2019
- Marvell World Trade Ltd.
- Runzi Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods and systems to improve yield in multiple chips integration...
- Patent number 10,056,363
- Issue date Aug 21, 2018
- Marvell World Trade Ltd.
- Runzi Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit manufacturing process for aligning threshold vol...
- Patent number 10,037,400
- Issue date Jul 31, 2018
- Marvell World Trade Ltd.
- Runzi Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Banked physical register data flow architecture in out-of-order pro...
- Patent number 10,007,521
- Issue date Jun 26, 2018
- Marvell International Ltd.
- Kit Sang Tam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for a high performance memory cell structure
- Patent number 9,830,976
- Issue date Nov 28, 2017
- Marvell International Ltd.
- Peter Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Banked physical register data flow architecture in out-of-order pro...
- Patent number 9,652,246
- Issue date May 16, 2017
- Marvell International Ltd.
- Kit Sang Tam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuits, architectures, apparatuses, systems, algorithms, and meth...
- Patent number 9,570,118
- Issue date Feb 14, 2017
- Marvell World Trade Ltd.
- Winston Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Disturb-proof static RAM cells
- Patent number 9,558,811
- Issue date Jan 31, 2017
- Marvell International Ltd.
- Winston Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive random access memory cell structure
- Patent number 9,490,427
- Issue date Nov 8, 2016
- Marvell World Trade Ltd.
- Pantas Sutardja
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for screening memory cells for disturb failures
- Patent number 9,424,911
- Issue date Aug 23, 2016
- Marvell World Trade Ltd.
- Winston Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for avoiding read disturbance in a static rando...
- Patent number 9,324,417
- Issue date Apr 26, 2016
- Marvell International Ltd.
- Winston Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for increasing the read sensitivity of a resist...
- Patent number 9,275,731
- Issue date Mar 1, 2016
- Marvell International Ltd.
- Pantas Sutardja
- G11 - INFORMATION STORAGE
Information Patent Grant
Test data reporting during memory testing
- Patent number 9,250,992
- Issue date Feb 2, 2016
- Marvell International Ltd.
- Kit Sang Tam
- G11 - INFORMATION STORAGE
Information Patent Grant
Reducing source contact to gate spacing to decrease transistor pitch
- Patent number 9,245,961
- Issue date Jan 26, 2016
- Marvell International Ltd.
- Albert Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for timing closure
- Patent number 9,223,920
- Issue date Dec 29, 2015
- Marvell World Trade Ltd.
- Jason T. Su
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuits, architectures, apparatuses, systems, algorithms, and meth...
- Patent number 9,218,856
- Issue date Dec 22, 2015
- Marvell World Trade Ltd.
- Winston Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive random access memory cell structure with reduced programm...
- Patent number 9,214,230
- Issue date Dec 15, 2015
- Marvell World Trade Ltd.
- Pantas Sutardja
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive memory cell and method for forming a resistive memory cell
- Patent number 9,147,837
- Issue date Sep 29, 2015
- Marvell International Ltd.
- Pantas Sutardja
- G11 - INFORMATION STORAGE
Information Patent Grant
Concurrent use of SRAM cells with both NMOS and PMOS pass gates in...
- Patent number 9,142,284
- Issue date Sep 22, 2015
- Marvell World Trade Ltd.
- Winston Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for reforming a memory cell of a memory
- Patent number 9,129,678
- Issue date Sep 8, 2015
- Marvell World Trade Ltd.
- Pantas Sutardja
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive random access memory and method for controlling manufactu...
- Patent number 9,112,133
- Issue date Aug 18, 2015
- Marvell World Trade Ltd.
- Pantas Sutardja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiport memory architecture
- Patent number 9,105,319
- Issue date Aug 11, 2015
- Marvell World Trade Ltd.
- Winston Lee
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
COMPUTER SYSTEM USING A PLURALITY OF SINGLE INSTRUCTION MULTIPLE DA...
- Publication number 20210406030
- Publication date Dec 30, 2021
- DeGirum Corporation
- Shashi Kiran Chilappagari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Efficient Architectures For Deep Learning Algorithms
- Publication number 20200341772
- Publication date Oct 29, 2020
- DeGirum Corporation
- Shashi Kiran Chilappagari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND SYSTEMS FOR PACKAGING AN INTEGRATED CIRCUIT
- Publication number 20200013768
- Publication date Jan 9, 2020
- Marvell World Trade Ltd.
- Runzi Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
System And Methods For Completing A Cascaded Clock Ring Bus
- Publication number 20190339733
- Publication date Nov 7, 2019
- DeGirum Corporation
- Winston Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System And Method For Asynchronous, Multiple Clock Domain Data Stre...
- Publication number 20190319775
- Publication date Oct 17, 2019
- DeGirum Corporation
- Winston Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Fabricating Memory Devices with Optimized Gate Oxide Thickness
- Publication number 20190259768
- Publication date Aug 22, 2019
- Marvell World Trade Ltd.
- Runzi Chang
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND SYSTEMS FOR PACKAGING SEMICONDUCTOR DEVICES TO IMPROVE...
- Publication number 20180331088
- Publication date Nov 15, 2018
- Marvell World Trade Ltd.
- Runzi Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods and Apparatus for Fabricating IC Chips with Tilted Patterning
- Publication number 20180144941
- Publication date May 24, 2018
- Marvell World Trade Ltd.
- Runzi Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Permutated Ring Network
- Publication number 20180145850
- Publication date May 24, 2018
- DeGirum Corporation
- Kit S. Tam
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Fabricating Memory Devices with Optimized Gate Oxide Thickness
- Publication number 20180122815
- Publication date May 3, 2018
- Marvell World Trade Ltd.
- Runzi Chang
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT MANUFACTURING PROCESS FOR ALIGNING THRESHOLD VOL...
- Publication number 20170351802
- Publication date Dec 7, 2017
- Marvell World Trade Ltd.
- Runzi Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and systems to improve yield in multiple chips integration...
- Publication number 20170133358
- Publication date May 11, 2017
- Marvell World Trade Ltd.
- Runzi Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEMS AND METHODS FOR INCREASING PACKING DENSITY IN A SEMICONDUCT...
- Publication number 20160358909
- Publication date Dec 8, 2016
- Marvell World Trade Ltd.
- Sehat Sutardja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RESISTIVE RANDOM ACCESS MEMORY CELL STRUCTURE
- Publication number 20160087201
- Publication date Mar 24, 2016
- Marvell World Trade Ltd.
- Pantas Sutardja
- G11 - INFORMATION STORAGE
Information Patent Application
CIRCUITS, ARCHITECTURES, APPARATUSES, SYSTEMS, ALGORITHMS, AND METH...
- Publication number 20160086638
- Publication date Mar 24, 2016
- Marvell International Ltd.
- Winston Lee
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR SCREENING MEMORY CELLS FOR DISTURB FAILURES
- Publication number 20150194207
- Publication date Jul 9, 2015
- Marvell World Trade Ltd.
- Winston LEE
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTIVE RANDOM ACCESS MEMORY CELL STRUCTURE WITH REDUCED PROGRAMM...
- Publication number 20150124520
- Publication date May 7, 2015
- Marvell World Trade Ltd.
- Pantas Sutardja
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR REFORMING A MEMORY CELL OF A MEMORY
- Publication number 20150063004
- Publication date Mar 5, 2015
- Marvell World Trade Ltd.
- Pantas Sutardja
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR TIMING CLOSURE
- Publication number 20140218093
- Publication date Aug 7, 2014
- Marvell World Trade Ltd.
- Jason T. SU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiport Memory Architecture
- Publication number 20140215164
- Publication date Jul 31, 2014
- Marvell World Trade Ltd.
- Winston LEE
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR SIMULTANEOUSLY ACCESSING A PLURALITY OF ME...
- Publication number 20140204682
- Publication date Jul 24, 2014
- Pantas Sutardja
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTIVE RANDOM ACCESS MEMORY AND METHOD FOR CONTROLLING MANUFACTU...
- Publication number 20140170832
- Publication date Jun 19, 2014
- Marvell World Trade Ltd.
- Pantas Sutardja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONCURRENT USE OF SRAM CELLS WITH BOTH NMOS AND PMOS PASS GATES IN...
- Publication number 20140133217
- Publication date May 15, 2014
- Marvell World Trade Ltd.
- Winston Lee
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM Cells Suitable for Fin Field-Effect Transistor (FinFET) Process
- Publication number 20140119103
- Publication date May 1, 2014
- Marvell World Trade Ltd.
- Peter Lee
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS AND METHOD FOR REFORMING RESISTIVE MEMORY CELLS
- Publication number 20140112057
- Publication date Apr 24, 2014
- Marvell World Trade Ltd.
- Pantas Sutardja
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEMS AND METHODS FOR READING RESISTIVE RANDOM ACCESS MEMORY (RRA...
- Publication number 20140104926
- Publication date Apr 17, 2014
- Marvell World Trade Ltd.
- Pantas Sutardja
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR FORMING A CONTACT IN A CELL OF A RESISTIVE...
- Publication number 20140104928
- Publication date Apr 17, 2014
- Marvell World Trade Ltd.
- Pantas SUTARDJA
- G11 - INFORMATION STORAGE
Information Patent Application
CONFIGURING RESISTIVE RANDOM ACCESS MEMORY (RRAM) ARRAY FOR WRITE O...
- Publication number 20140104927
- Publication date Apr 17, 2014
- Marvell World Trade Ltd.
- Pantas Sutardja
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS AND METHOD FOR REPAIRING RESISTIVE MEMORIES AND INCREASIN...
- Publication number 20140104924
- Publication date Apr 17, 2014
- Marvell World Trade Ltd.
- Pantas Sutardja
- G11 - INFORMATION STORAGE
Information Patent Application
Circuits, Architectures, Apparatuses, Systems, Algorithms, and Meth...
- Publication number 20140071782
- Publication date Mar 13, 2014
- Marvell International Ltd.
- Winston Lee
- G11 - INFORMATION STORAGE

Winston Lee

Person

Patents Grantslast 30 patents

Permutated ring network

Methods and systems for packaging an integrated circuit

System and methods for completing a cascaded clock ring bus

Methods and apparatus for fabricating IC chips with tilted patterning

MRAM structure for efficient manufacturability

Fabricating memory devices with optimized gate oxide thickness

System and method for asynchronous, multiple clock domain data stre...

Methods and systems for packaging semiconductor devices to improve...

Fabricating memory devices with optimized gate oxide thickness

Methods and systems to improve yield in multiple chips integration...

Integrated circuit manufacturing process for aligning threshold vol...

Banked physical register data flow architecture in out-of-order pro...

Systems and methods for a high performance memory cell structure

Banked physical register data flow architecture in out-of-order pro...

Circuits, architectures, apparatuses, systems, algorithms, and meth...

Disturb-proof static RAM cells

Resistive random access memory cell structure

Method and apparatus for screening memory cells for disturb failures

Systems and methods for avoiding read disturbance in a static rando...

Systems and methods for increasing the read sensitivity of a resist...

Test data reporting during memory testing

Reducing source contact to gate spacing to decrease transistor pitch

Method and apparatus for timing closure

Circuits, architectures, apparatuses, systems, algorithms, and meth...

Resistive random access memory cell structure with reduced programm...

Resistive memory cell and method for forming a resistive memory cell

Concurrent use of SRAM cells with both NMOS and PMOS pass gates in...

Method and apparatus for reforming a memory cell of a memory

Resistive random access memory and method for controlling manufactu...

Multiport memory architecture

Patents Applicationslast 30 patents

COMPUTER SYSTEM USING A PLURALITY OF SINGLE INSTRUCTION MULTIPLE DA...

Efficient Architectures For Deep Learning Algorithms

METHODS AND SYSTEMS FOR PACKAGING AN INTEGRATED CIRCUIT

System And Methods For Completing A Cascaded Clock Ring Bus

System And Method For Asynchronous, Multiple Clock Domain Data Stre...

Fabricating Memory Devices with Optimized Gate Oxide Thickness

METHODS AND SYSTEMS FOR PACKAGING SEMICONDUCTOR DEVICES TO IMPROVE...

Methods and Apparatus for Fabricating IC Chips with Tilted Patterning

Permutated Ring Network

Fabricating Memory Devices with Optimized Gate Oxide Thickness

INTEGRATED CIRCUIT MANUFACTURING PROCESS FOR ALIGNING THRESHOLD VOL...

Methods and systems to improve yield in multiple chips integration...

SYSTEMS AND METHODS FOR INCREASING PACKING DENSITY IN A SEMICONDUCT...

RESISTIVE RANDOM ACCESS MEMORY CELL STRUCTURE

CIRCUITS, ARCHITECTURES, APPARATUSES, SYSTEMS, ALGORITHMS, AND METH...

METHOD AND APPARATUS FOR SCREENING MEMORY CELLS FOR DISTURB FAILURES

RESISTIVE RANDOM ACCESS MEMORY CELL STRUCTURE WITH REDUCED PROGRAMM...

METHOD AND APPARATUS FOR REFORMING A MEMORY CELL OF A MEMORY

METHOD AND APPARATUS FOR TIMING CLOSURE

Multiport Memory Architecture

METHOD AND APPARATUS FOR SIMULTANEOUSLY ACCESSING A PLURALITY OF ME...

RESISTIVE RANDOM ACCESS MEMORY AND METHOD FOR CONTROLLING MANUFACTU...

CONCURRENT USE OF SRAM CELLS WITH BOTH NMOS AND PMOS PASS GATES IN...

SRAM Cells Suitable for Fin Field-Effect Transistor (FinFET) Process

APPARATUS AND METHOD FOR REFORMING RESISTIVE MEMORY CELLS

SYSTEMS AND METHODS FOR READING RESISTIVE RANDOM ACCESS MEMORY (RRA...

METHOD AND APPARATUS FOR FORMING A CONTACT IN A CELL OF A RESISTIVE...

CONFIGURING RESISTIVE RANDOM ACCESS MEMORY (RRAM) ARRAY FOR WRITE O...

APPARATUS AND METHOD FOR REPAIRING RESISTIVE MEMORIES AND INCREASIN...

Circuits, Architectures, Apparatuses, Systems, Algorithms, and Meth...