Wlodek KURJANOWICZ

Person

Arnprior, CA

People

Patents Grantslast 30 patents

Information Patent Grant
One time programmable (OTP) bit cell with integrated inhibit device
- Patent number 10,777,288
- Issue date Sep 15, 2020
- Synopsys, Inc.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for power signature suppression in memory devices
- Patent number 9,870,810
- Issue date Jan 16, 2018
- Sidense Corp.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
OTP memory cell having low current leakage
- Patent number 9,129,687
- Issue date Sep 8, 2015
- Sidense Corp.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
Anti-fuse memory cell
- Patent number 9,123,572
- Issue date Sep 1, 2015
- Sidense Corporation
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
Redundancy system for non-volatile memory
- Patent number 9,123,429
- Issue date Sep 1, 2015
- Sidense Corp.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
Low VT antifuse device
- Patent number 8,933,492
- Issue date Jan 13, 2015
- Sidense Corp.
- Wlodek Kurjanowicz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for testing unprogrammed OTP memory
- Patent number 8,767,433
- Issue date Jul 1, 2014
- Sidense Corp.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
Reverse optical proximity correction method
- Patent number 8,735,297
- Issue date May 27, 2014
- Sidense Corporation
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
Redundancy system for non-volatile memory
- Patent number 8,654,598
- Issue date Feb 18, 2014
- Sidense Corp.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
Test cells for an unprogrammed OTP memory array
- Patent number 8,526,254
- Issue date Sep 3, 2013
- Sidense Corp.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
AND-type one time programmable memory cell
- Patent number 8,471,355
- Issue date Jun 25, 2013
- Sidense Corp.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
Redundancy system for non-volatile memory
- Patent number 8,369,166
- Issue date Feb 5, 2013
- Sidense Corp.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
Anti-fuse memory cell
- Patent number 8,313,987
- Issue date Nov 20, 2012
- Sidense Corp.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
Split-channel antifuse array architecture
- Patent number 8,283,751
- Issue date Oct 9, 2012
- Sidense Corp.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for operating a register stage of a dual function data register
- Patent number 8,266,483
- Issue date Sep 11, 2012
- Sidense Corp.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
Low power antifuse sensing scheme with improved reliability
- Patent number 8,223,526
- Issue date Jul 17, 2012
- Sidense Corp.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
High reliability OTP memory
- Patent number 8,213,211
- Issue date Jul 3, 2012
- Sidense Corp.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
High speed OTP sensing scheme
- Patent number 8,130,532
- Issue date Mar 6, 2012
- Sidense Corp.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
Program verify method for OTP memories
- Patent number 8,082,476
- Issue date Dec 20, 2011
- Sidense Corp.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
Test circuit for an unprogrammed OTP memory array
- Patent number 8,059,479
- Issue date Nov 15, 2011
- Sidense Corp.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
Anti-fuse memory cell
- Patent number 8,026,574
- Issue date Sep 27, 2011
- Sidense Corporation
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual function data register
- Patent number 8,023,338
- Issue date Sep 20, 2011
- Sidense Corp.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
Mask programmable anti-fuse architecture
- Patent number 7,944,727
- Issue date May 17, 2011
- Sidense Corp.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
Power up detection system for a memory device
- Patent number 7,940,595
- Issue date May 10, 2011
- Sidense Corp.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
Program lock circuit for a mask programmable anti-fuse memory array
- Patent number 7,817,456
- Issue date Oct 19, 2010
- Sidense Corp.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
High speed OTP sensing scheme
- Patent number 7,764,532
- Issue date Jul 27, 2010
- Sidense Corp.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
Anti-fuse memory cell
- Patent number 7,755,162
- Issue date Jul 13, 2010
- Sidense Corp.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
Split-channel antifuse array architecture
- Patent number 7,642,138
- Issue date Jan 5, 2010
- Sidense Corporation
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
High speed OTP sensing scheme
- Patent number 7,511,982
- Issue date Mar 31, 2009
- Sidense Corp.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Grant
Split-channel antifuse array architecture
- Patent number 7,402,855
- Issue date Jul 22, 2008
- Sidense Corp.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
ONE TIME PROGRAMMABLE (OTP) BIT CELL WITH INTEGRATED INHIBIT DEVICE
- Publication number 20200051653
- Publication date Feb 13, 2020
- Synopsys, Inc.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND SYSTEM FOR POWER SIGNATURE SUPPRESSION IN MEMORY DEVICES
- Publication number 20170337957
- Publication date Nov 23, 2017
- SIDENSE CORP.
- Wlodek KURJANOWICZ
- G11 - INFORMATION STORAGE
Information Patent Application
ANTI-FUSE MEMORY CELL
- Publication number 20140209989
- Publication date Jul 31, 2014
- SIDENSE CORPORATION
- Wlodek KURJANOWICZ
- G11 - INFORMATION STORAGE
Information Patent Application
REDUNDANCY SYSTEM FOR NON-VOLATILE MEMORY
- Publication number 20140146625
- Publication date May 29, 2014
- SIDENSE CORP.
- Wlodek KURJANOWICZ
- G11 - INFORMATION STORAGE
Information Patent Application
REDUNDANCY SYSTEM FOR NON-VOLATILE MEMORY
- Publication number 20130128679
- Publication date May 23, 2013
- SIDENSE CORP.
- Wlodek KURJANOWICZ
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REVERSE OPTICAL PROXIMITY CORRECTION METHOD
- Publication number 20130059238
- Publication date Mar 7, 2013
- SIDENSE CORPORATION
- Wlodek KURJANOWICZ
- G11 - INFORMATION STORAGE
Information Patent Application
OTP MEMORY CELL HAVING LOW CURRENT LEAKAGE
- Publication number 20120211841
- Publication date Aug 23, 2012
- SIDENSE CORP.
- Wlodek KURJANOWICZ
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS FOR TESTING UNPROGRAMMED OTP MEMORY
- Publication number 20120182782
- Publication date Jul 19, 2012
- SIDENSE CORP.
- Wlodek KURJANOWICZ
- G11 - INFORMATION STORAGE
Information Patent Application
TEST CELLS FOR AN UNPROGRAMMED OTP MEMORY ARRAY
- Publication number 20120081942
- Publication date Apr 5, 2012
- SIDENSE CORP.
- Wlodek KURJANOWICZ
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAM VERIFY METHOD FOR OTP MEMORIES
- Publication number 20110317804
- Publication date Dec 29, 2011
- SIDENSE CORP.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Application
ANTI-FUSE MEMORY CELL
- Publication number 20110312169
- Publication date Dec 22, 2011
- SIDENSE CORP.
- Wlodek KURJANOWICZ
- G11 - INFORMATION STORAGE
Information Patent Application
AND-TYPE ONE TIME PROGRAMMABLE MEMORY CELL
- Publication number 20110103127
- Publication date May 5, 2011
- SIDENCE CORP.
- Wlodek KURJANOWICZ
- G11 - INFORMATION STORAGE
Information Patent Application
REDUNDANCY SYSTEM FOR NON-VOLATILE MEMORY
- Publication number 20110019491
- Publication date Jan 27, 2011
- SIDENSE CORP.
- Wlodek KURJANOWICZ
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH SPEED OTP SENSING SCHEME
- Publication number 20100259965
- Publication date Oct 14, 2010
- SIDENSE CORP.
- Wlodek KURJANOWICZ
- G11 - INFORMATION STORAGE
Information Patent Application
ANTI-FUSE MEMORY CELL
- Publication number 20100244115
- Publication date Sep 30, 2010
- SIDENSE CORPORATION
- Wlodek KURJANOWICZ
- G11 - INFORMATION STORAGE
Information Patent Application
LOW POWER ANTIFUSE SENSING SCHEME WITH IMPROVED RELIABILITY
- Publication number 20100220511
- Publication date Sep 2, 2010
- SIDENSE CORP.
- Wlodek KURJANOWICZ
- G11 - INFORMATION STORAGE
Information Patent Application
HIGH RELIABILITY OTP MEMORY
- Publication number 20100202183
- Publication date Aug 12, 2010
- SIDENSE CORP.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAM VERIFY METHOD FOR OTP MEMORIES
- Publication number 20100011266
- Publication date Jan 14, 2010
- SIDENSE CORP.
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE
Information Patent Application
POWER UP DETECTION SYSTEM FOR A MEMORY DEVICE
- Publication number 20100002527
- Publication date Jan 7, 2010
- SIDENSE CORP.
- Wlodek KURJANOWICZ
- G11 - INFORMATION STORAGE
Information Patent Application
DUAL FUNCTION DATA REGISTER
- Publication number 20090290434
- Publication date Nov 26, 2009
- SIDENSE CORP.
- Wlodek KURJANOWICZ
- G11 - INFORMATION STORAGE
Information Patent Application
MASK PROGRAMMABLE ANTI-FUSE ARCHITECTURE
- Publication number 20090262566
- Publication date Oct 22, 2009
- SIDENSE CORP.
- Wlodek KURJANOWICZ
- G11 - INFORMATION STORAGE
Information Patent Application
TEST CIRCUIT FOR AN UNPROGRAMMED OTP MEMORY ARRAY
- Publication number 20090251943
- Publication date Oct 8, 2009
- SIDENSE CORP.
- Wlodek KURJANOWICZ
- G11 - INFORMATION STORAGE
Information Patent Application
LOW VT ANTIFUSE DEVICE
- Publication number 20090250726
- Publication date Oct 8, 2009
- SIDENSE CORP.
- Wlodek KURJANOWICZ
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROGRAM LOCK CIRCUIT FOR A MASK PROGRAMMABLE ANTI-FUSE MEMORY ARRAY
- Publication number 20090180307
- Publication date Jul 16, 2009
- SIDENSE CORP.
- Wlodek KURJANOWICZ
- G11 - INFORMATION STORAGE
Information Patent Application
HIGH SPEED OTP SENSING SCHEME
- Publication number 20090154217
- Publication date Jun 18, 2009
- SIDENSE CORP.
- Wlodek KURJANOWICZ
- G11 - INFORMATION STORAGE
Information Patent Application
SPLIT-CHANNEL ANTIFUSE ARRAY ARCHITECTURE
- Publication number 20080246098
- Publication date Oct 9, 2008
- SIDENSE CORP.
- Wlodek KURJANOWICZ
- G11 - INFORMATION STORAGE
Information Patent Application
SPLIT-CHANNEL ANTIFUSE ARRAY ARCHITECTURE
- Publication number 20080038879
- Publication date Feb 14, 2008
- SIDENSE CORPORATION
- Wlodek KURJANOWICZ
- G11 - INFORMATION STORAGE
Information Patent Application
ANTI-FUSE MEMORY CELL
- Publication number 20070257331
- Publication date Nov 8, 2007
- SIDENSE CORPORATION
- Wlodek KURJANOWICZ
- G11 - INFORMATION STORAGE
Information Patent Application
HIGH SPEED OTP SENSING SCHEME
- Publication number 20070165441
- Publication date Jul 19, 2007
- SIDENSE CORPORATION
- Wlodek Kurjanowicz
- G11 - INFORMATION STORAGE

Wlodek KURJANOWICZ

Person

Patents Grantslast 30 patents

One time programmable (OTP) bit cell with integrated inhibit device

Method and system for power signature suppression in memory devices

OTP memory cell having low current leakage

Anti-fuse memory cell

Redundancy system for non-volatile memory

Low VT antifuse device

Methods for testing unprogrammed OTP memory

Reverse optical proximity correction method

Redundancy system for non-volatile memory

Test cells for an unprogrammed OTP memory array

AND-type one time programmable memory cell

Redundancy system for non-volatile memory

Anti-fuse memory cell

Split-channel antifuse array architecture

Method for operating a register stage of a dual function data register

Low power antifuse sensing scheme with improved reliability

High reliability OTP memory

High speed OTP sensing scheme

Program verify method for OTP memories

Test circuit for an unprogrammed OTP memory array

Anti-fuse memory cell

Dual function data register

Mask programmable anti-fuse architecture

Power up detection system for a memory device

Program lock circuit for a mask programmable anti-fuse memory array

High speed OTP sensing scheme

Anti-fuse memory cell

Split-channel antifuse array architecture

High speed OTP sensing scheme

Split-channel antifuse array architecture

Patents Applicationslast 30 patents

ONE TIME PROGRAMMABLE (OTP) BIT CELL WITH INTEGRATED INHIBIT DEVICE

METHOD AND SYSTEM FOR POWER SIGNATURE SUPPRESSION IN MEMORY DEVICES

ANTI-FUSE MEMORY CELL

REDUNDANCY SYSTEM FOR NON-VOLATILE MEMORY

REDUNDANCY SYSTEM FOR NON-VOLATILE MEMORY

REVERSE OPTICAL PROXIMITY CORRECTION METHOD

OTP MEMORY CELL HAVING LOW CURRENT LEAKAGE

METHODS FOR TESTING UNPROGRAMMED OTP MEMORY

TEST CELLS FOR AN UNPROGRAMMED OTP MEMORY ARRAY

PROGRAM VERIFY METHOD FOR OTP MEMORIES

ANTI-FUSE MEMORY CELL

AND-TYPE ONE TIME PROGRAMMABLE MEMORY CELL

REDUNDANCY SYSTEM FOR NON-VOLATILE MEMORY

HIGH SPEED OTP SENSING SCHEME

ANTI-FUSE MEMORY CELL

LOW POWER ANTIFUSE SENSING SCHEME WITH IMPROVED RELIABILITY

HIGH RELIABILITY OTP MEMORY

PROGRAM VERIFY METHOD FOR OTP MEMORIES

POWER UP DETECTION SYSTEM FOR A MEMORY DEVICE

DUAL FUNCTION DATA REGISTER

MASK PROGRAMMABLE ANTI-FUSE ARCHITECTURE

TEST CIRCUIT FOR AN UNPROGRAMMED OTP MEMORY ARRAY

LOW VT ANTIFUSE DEVICE

PROGRAM LOCK CIRCUIT FOR A MASK PROGRAMMABLE ANTI-FUSE MEMORY ARRAY

HIGH SPEED OTP SENSING SCHEME

SPLIT-CHANNEL ANTIFUSE ARRAY ARCHITECTURE

SPLIT-CHANNEL ANTIFUSE ARRAY ARCHITECTURE

ANTI-FUSE MEMORY CELL

HIGH SPEED OTP SENSING SCHEME