Wolfgang Hoenlein

Person

Unterhaching, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Sense amplifier with dual gate precharge and decode transistors
- Patent number 9,251,871
- Issue date Feb 2, 2016
- SOITEC
- Richard Ferrant
- G11 - INFORMATION STORAGE
Information Patent Grant
Fully depleted SOI device with buried doped layer
- Patent number 8,492,844
- Issue date Jul 23, 2013
- Soitec
- Gerhard Enders
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low temperature chemical vapor deposition process for forming bismu...
- Patent number 7,005,303
- Issue date Feb 28, 2006
- Advanced Technology Materials, Inc.
- Frank S. Hintermaier
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Low temperature chemical vapor deposition process for forming bismu...
- Patent number 6,730,523
- Issue date May 4, 2004
- Advanced Technology Materials, Inc.
- Frank S. Hintermaier
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Resistor cascade for forming electrical reference quantities and an...
- Patent number 6,466,152
- Issue date Oct 15, 2002
- Infineon Technologies AG
- Wolfgang Hoenlein
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Method of manufacture of a capacitor with a dielectric on the basis...
- Patent number 6,455,328
- Issue date Sep 24, 2002
- Infineon Technologies AG
- Harald Bachhofer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low temperature chemical vapor deposition process for forming bismu...
- Patent number 6,303,391
- Issue date Oct 16, 2001
- Advanced Technology Materials, Inc.
- Frank S. Hintermaier
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Method for manufacturing a capacitor for a semiconductor arrangement
- Patent number 6,022,786
- Issue date Feb 8, 2000
- Siemens Aktiengesellschaft
- Martin Franosch
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Capacitor in a semiconductor configuration and process for its prod...
- Patent number 5,989,972
- Issue date Nov 23, 1999
- Siemens Aktiengesellschaft
- Dietrich Widmann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit structure having at least one capacitor and a method for th...
- Patent number 5,759,903
- Issue date Jun 2, 1998
- Siemens Aktiengesellschaft
- Volker Lehmann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a cubically integrated circuit arrangement
- Patent number 5,529,950
- Issue date Jun 25, 1996
- Siemens Aktiengesellschaft
- Wolfgang Hoenlein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a solar cell from a substrate wafer
- Patent number 5,494,832
- Issue date Feb 27, 1996
- Siemens Aktiengesellschaft
- Volker Lehmann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing rod-shaped silicon structures
- Patent number 5,449,310
- Issue date Sep 12, 1995
- Siemens Aktiengesellschaft
- Reinhard Stengl
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-chip module
- Patent number 5,365,405
- Issue date Nov 15, 1994
- Siemens Aktiengesellschaft
- Wolfgang Hoenlein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a component with porous silicon
- Patent number 5,360,759
- Issue date Nov 1, 1994
- Siemens Aktiengesellschaft
- Reinhard Stengl
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a solar cell from a substrate wafer
- Patent number 5,306,647
- Issue date Apr 26, 1994
- Siemens Aktiengesellschaft
- Volker Lehmann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing an electrically conductive tip composed of...
- Patent number 5,188,977
- Issue date Feb 23, 1993
- Siemens Aktiengesellschaft
- Reinhard Stengl
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SENSE AMPLIFIER WITH DUAL GATE PRECHARGE AND DECODE TRANSISTORS
- Publication number 20140321225
- Publication date Oct 30, 2014
- SOITEC
- Richard Ferrant
- G11 - INFORMATION STORAGE
Information Patent Application
FULLY DEPLETED SOI DEVICE WITH BURIED DOPED LAYER
- Publication number 20120181609
- Publication date Jul 19, 2012
- Gerhard Enders
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for producing a microelectronic structure
- Publication number 20090011556
- Publication date Jan 8, 2009
- Gerhard Beitel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT HAVING A MULTILAYER CAPACITANCE ARRANGEMENT
- Publication number 20070216030
- Publication date Sep 20, 2007
- INFINEON TECHNOLOGIES AG
- Guenther Schindler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low temperature chemical vapor deposition process for forming bismu...
- Publication number 20040209384
- Publication date Oct 21, 2004
- Frank S. Hintermaier
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
Method for producing a microelectronic structure
- Publication number 20020155660
- Publication date Oct 24, 2002
- Gerhard Beitel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Resistor cascade for forming electrical reference quantities and an...
- Publication number 20020126031
- Publication date Sep 12, 2002
- Wolfgang Hoenlein
- B82 - NANO-TECHNOLOGY
Information Patent Application
Multiwall nanotube and process for oxidizing only the outer wall of...
- Publication number 20020125470
- Publication date Sep 12, 2002
- Wolfgang Hoenlein
- B82 - NANO-TECHNOLOGY
Information Patent Application
Method of manufacture of a capacitor with a dielectric on the basis...
- Publication number 20020019108
- Publication date Feb 14, 2002
- Infineon Technologies, AG
- Harald Bachhofer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low temperature chemical vapor deposition process for forming bismu...
- Publication number 20010041374
- Publication date Nov 15, 2001
- Advanced Technology Materials, Inc.
- Frank S. Hintermaier
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...

Wolfgang Hoenlein

Person

Patents Grantslast 30 patents

Sense amplifier with dual gate precharge and decode transistors

Fully depleted SOI device with buried doped layer

Low temperature chemical vapor deposition process for forming bismu...

Low temperature chemical vapor deposition process for forming bismu...

Resistor cascade for forming electrical reference quantities and an...

Method of manufacture of a capacitor with a dielectric on the basis...

Low temperature chemical vapor deposition process for forming bismu...

Method for manufacturing a capacitor for a semiconductor arrangement

Capacitor in a semiconductor configuration and process for its prod...

Circuit structure having at least one capacitor and a method for th...

Method for manufacturing a cubically integrated circuit arrangement

Method for manufacturing a solar cell from a substrate wafer

Method for manufacturing rod-shaped silicon structures

Multi-chip module

Method for manufacturing a component with porous silicon

Method for manufacturing a solar cell from a substrate wafer

Method for manufacturing an electrically conductive tip composed of...

Patents Applicationslast 30 patents

SENSE AMPLIFIER WITH DUAL GATE PRECHARGE AND DECODE TRANSISTORS

FULLY DEPLETED SOI DEVICE WITH BURIED DOPED LAYER

Method for producing a microelectronic structure

INTEGRATED CIRCUIT HAVING A MULTILAYER CAPACITANCE ARRANGEMENT

Low temperature chemical vapor deposition process for forming bismu...

Method for producing a microelectronic structure

Resistor cascade for forming electrical reference quantities and an...

Multiwall nanotube and process for oxidizing only the outer wall of...

Method of manufacture of a capacitor with a dielectric on the basis...

Low temperature chemical vapor deposition process for forming bismu...