Xiang Hu

Person

Malta, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Devices with chamfer-less vias multi-patterning and methods for for...
- Patent number 10,181,420
- Issue date Jan 15, 2019
- GLOBALFOUNDRIES Inc.
- Jason Eugene Stephens
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Planar metrology pad adjacent a set of fins of a fin field effect t...
- Patent number 10,121,711
- Issue date Nov 6, 2018
- GLOBALFOUNDRIES Inc.
- Sipeng Gu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hard mask etch and dielectric etch aware overlap for via and metal...
- Patent number 9,817,927
- Issue date Nov 14, 2017
- GLOBALFOUNDRIES Inc.
- Guo Xiang Ning
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Non-planar semiconductor device with multiple-head epitaxial struct...
- Patent number 9,793,358
- Issue date Oct 17, 2017
- GLOBALFOUNDRIES Inc.
- Xusheng Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure having gap fill dielectric layer disposed b...
- Patent number 9,735,154
- Issue date Aug 15, 2017
- GLOBALFOUNDRIES Inc.
- Andy Chih-Hung Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dimension-controlled via formation processing
- Patent number 9,666,476
- Issue date May 30, 2017
- GLOBALFOUNDRIES Inc.
- Xiang Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FinFET devices comprising a dielectric layer/CMP stop layer/hardmas...
- Patent number 9,520,395
- Issue date Dec 13, 2016
- GLOBALFOUNDRIES Inc.
- Guillaume Bouche
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Mixed N/P-type fin semiconductor structure with epitaxial materials...
- Patent number 9,508,794
- Issue date Nov 29, 2016
- GLOBALFOUNDRIES Inc.
- Xusheng Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits having improved gate structures and methods for...
- Patent number 9,490,129
- Issue date Nov 8, 2016
- GLOBALFOUNDRIES, INC.
- Xiang Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned contacts and methods of fabrication
- Patent number 9,460,963
- Issue date Oct 4, 2016
- GLOBALFOUNDRIES Inc.
- Gabriel Padron Wells
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lithographic stack excluding SiARC and method of using same
- Patent number 9,431,528
- Issue date Aug 30, 2016
- GLOBALFOUNDRIES Inc.
- Hong Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Feature etching using varying supply of power pulses
- Patent number 9,401,263
- Issue date Jul 26, 2016
- GLOBALFOUNDRIES Inc.
- Xiang Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dimension-controlled via formation processing
- Patent number 9,305,832
- Issue date Apr 5, 2016
- GLOBALFOUNDRIES Inc.
- Xiang Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor contacts and methods of fabrication
- Patent number 9,305,785
- Issue date Apr 5, 2016
- GLOBALFOUNDRIES Inc.
- Andy Chih-Hung Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Decoupling measurement of layer thicknesses of a plurality of layer...
- Patent number 9,281,249
- Issue date Mar 8, 2016
- GLOBALFOUNDRIES Inc.
- Alok Vaid
- G01 - MEASURING TESTING
Information Patent Grant
Method for increasing a surface area of epitaxial structures in a m...
- Patent number 9,275,906
- Issue date Mar 1, 2016
- GLOBALFOUNDRIES Inc.
- Xusheng Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Customized alleviation of stresses generated by through-substrate v...
- Patent number 9,236,301
- Issue date Jan 12, 2016
- GLOBALFOUNDRIES Inc.
- GuoXiang Ning
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Patterning multiple, dense features in a semiconductor device using...
- Patent number 9,224,842
- Issue date Dec 29, 2015
- GLOBALFOUNDRIES Inc.
- Guillaume Bouche
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming semiconductor fins
- Patent number 9,196,499
- Issue date Nov 24, 2015
- GLOBALFOUNDRIES Inc.
- Andy Chih-Hung Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Planar metrology pad adjacent a set of fins of a fin field effect t...
- Patent number 9,129,905
- Issue date Sep 8, 2015
- GLOBALFOUNDRIES Inc.
- Xiang Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Planar metrology pad adjacent a set of fins of a fin field effect t...
- Patent number 9,121,890
- Issue date Sep 1, 2015
- GLOBALFOUNDRIES Inc.
- Sipeng Gu
- G01 - MEASURING TESTING
Information Patent Grant
Devices and methods of forming fins at tight fin pitches
- Patent number 9,105,478
- Issue date Aug 11, 2015
- GLOBALFOUNDRIES Inc.
- Andy Wei
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Integrated circuits having laterally confined epitaxial material ov...
- Patent number 9,040,380
- Issue date May 26, 2015
- GLOBALFOUNDRIES, INC.
- Xiang Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Facilitating mask pattern formation
- Patent number 9,034,767
- Issue date May 19, 2015
- GLOBALFOUNDRIES Inc.
- Xiang Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for fabricating integrated circuits with improved patternin...
- Patent number 8,940,641
- Issue date Jan 27, 2015
- GLOBALFOUNDRIES, INC.
- Xiang Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect formation using a sidewall mask layer
- Patent number 8,916,472
- Issue date Dec 23, 2014
- GLOBALFOUNDRIES Inc.
- Xiang Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit structures and methods of fabrication with enhanced contact...
- Patent number 8,907,496
- Issue date Dec 9, 2014
- GLOBALFOUNDRIES Inc.
- GuoXiang Ning
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Double-pattern gate formation processing with critical dimension co...
- Patent number 8,877,642
- Issue date Nov 4, 2014
- GLOBALFOUNDRIES Inc.
- Xiang Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sealed shallow trench isolation region
- Patent number 8,859,388
- Issue date Oct 14, 2014
- International Business Machines Corporation
- Michael V. Aquilino
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing semiconductor devices including replacement...
- Patent number 8,835,292
- Issue date Sep 16, 2014
- International Business Machines Corporation
- Michael P. Chudzik
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
DEVICES WITH CHAMFER-LESS VIAS MULTI-PATTERNING AND METHODS FOR FOR...
- Publication number 20180226294
- Publication date Aug 9, 2018
- GLOBALFOUNDRIES INC.
- Jason Eugene STEPHENS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HARD MASK ETCH AND DIELECTRIC ETCH AWARE OVERLAP FOR VIA AND METAL...
- Publication number 20170061044
- Publication date Mar 2, 2017
- GLOBALFOUNDRIES INC.
- Guo Xiang NING
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INCREASED SURFACE AREA OF EPITAXIAL STRUCTURES IN A MIXED N/P TYPE...
- Publication number 20160155799
- Publication date Jun 2, 2016
- GLOBALFOUNDRIES INC.
- Xusheng WU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIMENSION-CONTROLLED VIA FORMATION PROCESSING
- Publication number 20160099171
- Publication date Apr 7, 2016
- GLOBALFOUNDRIES INC.
- Xiang HU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PATTERNING MULTIPLE, DENSE FEATURES IN A SEMICONDUCTOR DEVICE USING...
- Publication number 20160079242
- Publication date Mar 17, 2016
- GLOBALFOUNDRIES INC.
- GUILLAUME BOUCHE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING SEMICONDUCTOR FINS
- Publication number 20160043081
- Publication date Feb 11, 2016
- GLOBALFOUNDRIES INC.
- Andy Chih-Hung Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIMENSION-CONTROLLED VIA FORMATION PROCESSING
- Publication number 20150380246
- Publication date Dec 31, 2015
- GLOBALFOUNDRIES INC.
- Xiang HU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR CONTACTS AND METHODS OF FABRICATION
- Publication number 20150380250
- Publication date Dec 31, 2015
- GLOBALFOUNDRIES INC.
- Andy Chih-Hung Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PLANAR METROLOGY PAD ADJACENT A SET OF FINS IN A FIN FIELD EFFECT T...
- Publication number 20150348913
- Publication date Dec 3, 2015
- GLOBALFOUNDRIES INC.
- Xiang Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PLANAR METROLOGY PAD ADJACENT A SET OF FINS OF A FIN FIELD EFFECT T...
- Publication number 20150340296
- Publication date Nov 26, 2015
- GLOBALFOUNDRIES INC.
- Sipeng Gu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LITHOGRAPHIC STACK EXCLUDING SiARC AND METHOD OF USING SAME
- Publication number 20150332934
- Publication date Nov 19, 2015
- GLOBALFOUNDRIES INC.
- Hong YU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS HAVING IMPROVED GATE STRUCTURES AND METHODS FOR...
- Publication number 20150325482
- Publication date Nov 12, 2015
- GLOBALFOUNDRIES, Inc.
- Xiang Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MIXED N/P TYPE NON-PLANAR SEMICONDUCTOR STRUCTURE WITH MULTIPLE EPI...
- Publication number 20150318217
- Publication date Nov 5, 2015
- Xusheng WU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTIPLE EPITAXIAL HEAD RAISED SEMICONDUCTOR STRUCTURE AND METHOD O...
- Publication number 20150318351
- Publication date Nov 5, 2015
- GLOBALFOUNDRIES INC.
- Xusheng WU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PATTERNING MULTIPLE, DENSE FEATURES IN A SEMICONDUCTOR DEVICE USING...
- Publication number 20150303273
- Publication date Oct 22, 2015
- GLOBALFOUNDRIES INC.
- Guillaume Bouche
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED CONTACT OPENINGS OVER FINS OF A SEMICONDUCTOR DEVICE
- Publication number 20150303295
- Publication date Oct 22, 2015
- GLOBALFOUNDRIES INC.
- Jing Wan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICES AND METHODS OF FORMING FINS AT TIGHT FIN PITCHES
- Publication number 20150287595
- Publication date Oct 8, 2015
- GLOBALFOUNDRIES INC.
- Andy WEI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING SEMICONDUCTOR FINS
- Publication number 20150279684
- Publication date Oct 1, 2015
- GLOBALFOUNDRIES INC.
- Andy Chih-Hung Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED CONTACTS AND METHODS OF FABRICATION
- Publication number 20150279738
- Publication date Oct 1, 2015
- GLOBALFOUNDRIES INC.
- Gabriel Padron Wells
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FABRICATION OF SEMICONDUCTOR STRUCTURES USING OXIDIZED POLYCRYSTALL...
- Publication number 20150270159
- Publication date Sep 24, 2015
- GLOBALFOUNDRIES INC.
- Haigou HUANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PARTIALLY CRYSTALLIZED FIN HARD MASK FOR FIN FIELD-EFFECT-TRANSISTO...
- Publication number 20150270175
- Publication date Sep 24, 2015
- GLOBALFOUNDRIES INC.
- Xiang Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FORMING SOURCE/DRAIN REGIONS WITH SINGLE RETICLE AND RESULTING DEVICE
- Publication number 20150255353
- Publication date Sep 10, 2015
- GLOBALFOUNDRIES INC.
- Jing WAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DECOUPLING MEASUREMENT OF LAYER THICKNESSES OF A PLURALITY OF LAYER...
- Publication number 20150198435
- Publication date Jul 16, 2015
- GLOBALFOUNDRIES INC.
- Alok VAID
- G01 - MEASURING TESTING
Information Patent Application
FACILITATING MASK PATTERN FORMATION
- Publication number 20150132962
- Publication date May 14, 2015
- GLOBALFOUNDRIES INC.
- Xiang HU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PLANAR METROLOGY PAD ADJACENT A SET OF FINS OF A FIN FIELD EFFECT T...
- Publication number 20150123212
- Publication date May 7, 2015
- GLOBALFOUNDRIES INC.
- Xiang Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICES AND METHODS OF FORMING FINS AT TIGHT FIN PITCHES
- Publication number 20150115418
- Publication date Apr 30, 2015
- GLOBALFOUNDRIES INC.
- Andy WEI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PLANAR METROLOGY PAD ADJACENT A SET OF FINS OF A FIN FIELD EFFECT T...
- Publication number 20150115267
- Publication date Apr 30, 2015
- GLOBALFOUNDRIES INC.
- Sipeng Gu
- G01 - MEASURING TESTING
Information Patent Application
FEATURE ETCHING USING VARYING SUPPLY OF POWER PULSES
- Publication number 20150076111
- Publication date Mar 19, 2015
- GLOBALFOUNDRIES INC.
- Xiang HU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS HAVING LATERALLY CONFINED EPITAXIAL MATERIAL OV...
- Publication number 20150069515
- Publication date Mar 12, 2015
- GLOBALFOUNDRIES, INC.
- Xiang Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CUSTOMIZED ALLEVIATION OF STRESSES GENERATED BY THROUGH-SUBSTRATE V...
- Publication number 20150017803
- Publication date Jan 15, 2015
- GLOBALFOUNDRIES INC.
- Guoxiang NING
- H01 - BASIC ELECTRIC ELEMENTS

Person

Patents Grantslast 30 patents

Devices with chamfer-less vias multi-patterning and methods for for...

Planar metrology pad adjacent a set of fins of a fin field effect t...

Hard mask etch and dielectric etch aware overlap for via and metal...

Non-planar semiconductor device with multiple-head epitaxial struct...

Semiconductor structure having gap fill dielectric layer disposed b...

Dimension-controlled via formation processing

FinFET devices comprising a dielectric layer/CMP stop layer/hardmas...

Mixed N/P-type fin semiconductor structure with epitaxial materials...

Integrated circuits having improved gate structures and methods for...

Self-aligned contacts and methods of fabrication

Lithographic stack excluding SiARC and method of using same

Feature etching using varying supply of power pulses

Dimension-controlled via formation processing

Semiconductor contacts and methods of fabrication

Decoupling measurement of layer thicknesses of a plurality of layer...

Method for increasing a surface area of epitaxial structures in a m...

Customized alleviation of stresses generated by through-substrate v...

Patterning multiple, dense features in a semiconductor device using...

Method of forming semiconductor fins

Planar metrology pad adjacent a set of fins of a fin field effect t...

Planar metrology pad adjacent a set of fins of a fin field effect t...

Devices and methods of forming fins at tight fin pitches

Integrated circuits having laterally confined epitaxial material ov...

Facilitating mask pattern formation

Methods for fabricating integrated circuits with improved patternin...

Interconnect formation using a sidewall mask layer

Circuit structures and methods of fabrication with enhanced contact...

Double-pattern gate formation processing with critical dimension co...

Sealed shallow trench isolation region

Method of manufacturing semiconductor devices including replacement...

Patents Applicationslast 30 patents

DEVICES WITH CHAMFER-LESS VIAS MULTI-PATTERNING AND METHODS FOR FOR...

HARD MASK ETCH AND DIELECTRIC ETCH AWARE OVERLAP FOR VIA AND METAL...

INCREASED SURFACE AREA OF EPITAXIAL STRUCTURES IN A MIXED N/P TYPE...

DIMENSION-CONTROLLED VIA FORMATION PROCESSING

PATTERNING MULTIPLE, DENSE FEATURES IN A SEMICONDUCTOR DEVICE USING...

METHOD OF FORMING SEMICONDUCTOR FINS

DIMENSION-CONTROLLED VIA FORMATION PROCESSING

SEMICONDUCTOR CONTACTS AND METHODS OF FABRICATION

PLANAR METROLOGY PAD ADJACENT A SET OF FINS IN A FIN FIELD EFFECT T...

PLANAR METROLOGY PAD ADJACENT A SET OF FINS OF A FIN FIELD EFFECT T...

LITHOGRAPHIC STACK EXCLUDING SiARC AND METHOD OF USING SAME

INTEGRATED CIRCUITS HAVING IMPROVED GATE STRUCTURES AND METHODS FOR...

MIXED N/P TYPE NON-PLANAR SEMICONDUCTOR STRUCTURE WITH MULTIPLE EPI...

MULTIPLE EPITAXIAL HEAD RAISED SEMICONDUCTOR STRUCTURE AND METHOD O...

PATTERNING MULTIPLE, DENSE FEATURES IN A SEMICONDUCTOR DEVICE USING...

SELF-ALIGNED CONTACT OPENINGS OVER FINS OF A SEMICONDUCTOR DEVICE

DEVICES AND METHODS OF FORMING FINS AT TIGHT FIN PITCHES

METHOD OF FORMING SEMICONDUCTOR FINS

SELF-ALIGNED CONTACTS AND METHODS OF FABRICATION

FABRICATION OF SEMICONDUCTOR STRUCTURES USING OXIDIZED POLYCRYSTALL...

PARTIALLY CRYSTALLIZED FIN HARD MASK FOR FIN FIELD-EFFECT-TRANSISTO...

FORMING SOURCE/DRAIN REGIONS WITH SINGLE RETICLE AND RESULTING DEVICE

DECOUPLING MEASUREMENT OF LAYER THICKNESSES OF A PLURALITY OF LAYER...

FACILITATING MASK PATTERN FORMATION

PLANAR METROLOGY PAD ADJACENT A SET OF FINS OF A FIN FIELD EFFECT T...

DEVICES AND METHODS OF FORMING FINS AT TIGHT FIN PITCHES

PLANAR METROLOGY PAD ADJACENT A SET OF FINS OF A FIN FIELD EFFECT T...

FEATURE ETCHING USING VARYING SUPPLY OF POWER PULSES

INTEGRATED CIRCUITS HAVING LATERALLY CONFINED EPITAXIAL MATERIAL OV...

CUSTOMIZED ALLEVIATION OF STRESSES GENERATED BY THROUGH-SUBSTRATE V...