Xiangang Luo

Person

Fremont, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Virtual indexing in a memory device
- Patent number 12,210,448
- Issue date Jan 28, 2025
- Micron Technology, Inc.
- Xiangang Luo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parity protection in non-volatile memory
- Patent number 12,197,743
- Issue date Jan 14, 2025
- Micron Technology, Inc.
- Xiangang Luo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Redundant array management techniques
- Patent number 12,111,724
- Issue date Oct 8, 2024
- Micron Technology, Inc.
- Chun Sum Yeung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory sub-system for monitoring mixed mode blocks
- Patent number 12,073,107
- Issue date Aug 27, 2024
- Micron Technology, Inc.
- Jianmin Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voltage calibration scans to reduce memory device overhead
- Patent number 12,057,185
- Issue date Aug 6, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determining offsets for memory read operations
- Patent number 12,027,213
- Issue date Jul 2, 2024
- Micron Technology, Inc.
- Jie Zhou
- G11 - INFORMATION STORAGE
Information Patent Grant
Selective partitioning of sets of pages programmed to memory device
- Patent number 11,995,326
- Issue date May 28, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic superblock construction
- Patent number 11,989,433
- Issue date May 21, 2024
- Micron Technology, Inc.
- Kishore K. Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voltage bin calibration based on a voltage distribution reference v...
- Patent number 11,966,616
- Issue date Apr 23, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory sub-system using partial superblocks
- Patent number 11,934,268
- Issue date Mar 19, 2024
- Micron Technology, Inc.
- Jianmin Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Source address memory managment
- Patent number 11,928,356
- Issue date Mar 12, 2024
- Micron Technology, Inc.
- Xiangang Luo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive block mapping
- Patent number 11,922,069
- Issue date Mar 5, 2024
- Micron Technology, Inc.
- Alberto Sassara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reactive read based on metrics to screen defect prone memory blocks
- Patent number 11,914,490
- Issue date Feb 27, 2024
- Micron Technology, Inc.
- Harish Reddy Singidi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing storage of multiple plane parity data in a memory sub-system
- Patent number 11,907,066
- Issue date Feb 20, 2024
- Micron Technology, Inc.
- Xiangang Luo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
L2P translation techniques in limited RAM systems to increase rando...
- Patent number 11,899,574
- Issue date Feb 13, 2024
- Micron Technology, Inc.
- Xiangang Luo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing workload of programming sets of pages to memory device
- Patent number 11,886,336
- Issue date Jan 30, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing error-handling flows in memory devices
- Patent number 11,837,307
- Issue date Dec 5, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory sub-system data migration
- Patent number 11,829,650
- Issue date Nov 28, 2023
- Micron Technology, Inc.
- Ting Luo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using incomplete super blocks for increased write performance
- Patent number 11,829,623
- Issue date Nov 28, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Media management on power-up
- Patent number 11,822,796
- Issue date Nov 21, 2023
- Micron Technology, Inc.
- Tao Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voltage bin calibration based on a temporary voltage shift offset
- Patent number 11,823,748
- Issue date Nov 21, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-tier threshold voltage offset bin calibration
- Patent number 11,783,901
- Issue date Oct 10, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Read error recovery
- Patent number 11,775,181
- Issue date Oct 3, 2023
- Micron Technology, Inc.
- Xiangang Luo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device virtual blocks using half good blocks
- Patent number 11,776,655
- Issue date Oct 3, 2023
- Micron Technology, Inc.
- Sri Rama Namala
- G11 - INFORMATION STORAGE
Information Patent Grant
Prioritization of error control operations at a memory sub-system
- Patent number 11,740,957
- Issue date Aug 29, 2023
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partial superblock memory management
- Patent number 11,733,892
- Issue date Aug 22, 2023
- Micron Technology, Inc.
- Xiangang Luo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Grown bad block management in a memory sub-system
- Patent number 11,728,006
- Issue date Aug 15, 2023
- Micron Technology, Inc.
- Tao Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-page parity protection with power loss handling
- Patent number 11,726,867
- Issue date Aug 15, 2023
- Micron Technology, Inc.
- Harish Reddy Singidi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing error-handling flows in memory devices
- Patent number 11,709,727
- Issue date Jul 25, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous power loss impacted data structure
- Patent number 11,704,028
- Issue date Jul 18, 2023
- Micron Technology, Inc.
- Xiangang Luo
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MEMORY SUB-SYSTEM FOR MONITORING MIXED MODE BLOCKS
- Publication number 20240411475
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Jianmin Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETERMINING OFFSETS FOR MEMORY READ OPERATIONS
- Publication number 20240404604
- Publication date Dec 5, 2024
- Micron Technology, Inc.
- Jie Zhou
- G11 - INFORMATION STORAGE
Information Patent Application
MANAGING ALLOCATION OF HALF GOOD BLOCKS
- Publication number 20240370181
- Publication date Nov 7, 2024
- Micron Technology, Inc.
- Yuqi Zhu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUAL INDEXING IN A MEMORY DEVICE
- Publication number 20240345947
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Xiangang Luo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC SUPERBLOCK CONSTRUCTION
- Publication number 20240311029
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- Kishore K. Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMING ERASE BLOCKS COUPLED TO A SAME STRING
- Publication number 20240311057
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- Daniel J. Hubbard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE BLOCK MAPPING
- Publication number 20240272832
- Publication date Aug 15, 2024
- Micron Technology, Inc.
- Alberto Sassara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VOLTAGE BIN CALIBRATION BASED ON A VOLTAGE DISTRIBUTION REFERENCE V...
- Publication number 20240231676
- Publication date Jul 11, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SOURCE ADDRESS MEMORY MANAGMENT
- Publication number 20240211168
- Publication date Jun 27, 2024
- Micron Technology, Inc.
- Xiangang Luo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISTURB TRACKING AMONG MULTIPLE ERASE BLOCKS COUPLED TO A SAME STRING
- Publication number 20240168878
- Publication date May 23, 2024
- Micron Technology, Inc.
- Akira Goda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
READ DISTURB TRACKING AMONG MULTIPLE ERASE BLOCKS COUPLED TO A SAME...
- Publication number 20240168879
- Publication date May 23, 2024
- Micron Technology, Inc.
- Akira Goda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETERMINING OFFSETS FOR MEMORY READ OPERATIONS
- Publication number 20240120011
- Publication date Apr 11, 2024
- Micron Technology, lnc.
- Jie Zhou
- G11 - INFORMATION STORAGE
Information Patent Application
SUPER BLOCK MANAGEMENT FOR EFFICIENT UTILIZATION
- Publication number 20240069776
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Xiangang Luo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE BLOCK MAPPING
- Publication number 20230376245
- Publication date Nov 23, 2023
- Micron Technology, Inc.
- Alberto Sassara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING ERROR-HANDLING FLOWS IN MEMORY DEVICES
- Publication number 20230325273
- Publication date Oct 12, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SUB-SYSTEM USING PARTIAL SUPERBLOCKS
- Publication number 20230205629
- Publication date Jun 29, 2023
- Micron Technology, Inc.
- Jianmin Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VOLTAGE BIN CALIBRATION BASED ON A VOLTAGE DISTRIBUTION REFERENCE V...
- Publication number 20230205447
- Publication date Jun 29, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SOURCE ADDRESS MEMORY MANAGMENT
- Publication number 20230195356
- Publication date Jun 22, 2023
- Micron Technology, Inc.
- Xiangang Luo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USING INCOMPLETE SUPER BLOCKS FOR INCREASED WRITE PERFORMANCE
- Publication number 20230195341
- Publication date Jun 22, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SUB-SYSTEM DATA MIGRATION
- Publication number 20230176789
- Publication date Jun 8, 2023
- Micron Technology, Inc.
- Ting Luo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING WORKLOAD OF PROGRAMMING SETS OF PAGES TO MEMORY DEVICE
- Publication number 20230176963
- Publication date Jun 8, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VOLTAGE CALIBRATION SCANS TO REDUCE MEMORY DEVICE OVERHEAD
- Publication number 20230122275
- Publication date Apr 20, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARITY PROTECTION IN NON-VOLATILE MEMORY
- Publication number 20230082008
- Publication date Mar 16, 2023
- Micron Technology, Inc.
- Xiangang Luo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC SUPERBLOCK CONSTRUCTION
- Publication number 20230061800
- Publication date Mar 2, 2023
- Micron Technology, Inc.
- Kishore K. Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SUB-SYSTEM USING PARTIAL SUPERBLOCKS
- Publication number 20230069159
- Publication date Mar 2, 2023
- Micron Technology, Inc.
- Jianmin Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING ERROR-HANDLING FLOWS IN MEMORY DEVICES
- Publication number 20230046724
- Publication date Feb 16, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SUB-SYSTEM DATA MIGRATION
- Publication number 20230043733
- Publication date Feb 9, 2023
- Micron Technology, Inc.
- Ting Luo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE VIRTUAL BLOCKS USING HALF GOOD BLOCKS
- Publication number 20230033870
- Publication date Feb 2, 2023
- Micron Technology, Inc.
- Sri Rama Namala
- G11 - INFORMATION STORAGE
Information Patent Application
L2P TRANSLATION TECHNIQUES IN LIMITED RAM SYSTEMS TO INCREASE RANDO...
- Publication number 20230031365
- Publication date Feb 2, 2023
- Micron Technology, Inc.
- Xiangang Luo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SUB-SYSTEM FOR MONITORING MIXED MODE BLOCKS
- Publication number 20230015066
- Publication date Jan 19, 2023
- Micron Technology, Inc.
- Jianmin Huang
- G06 - COMPUTING CALCULATING COUNTING

Xiangang Luo

Person

Patents Grantslast 30 patents

Virtual indexing in a memory device

Parity protection in non-volatile memory

Redundant array management techniques

Memory sub-system for monitoring mixed mode blocks

Voltage calibration scans to reduce memory device overhead

Determining offsets for memory read operations

Selective partitioning of sets of pages programmed to memory device

Dynamic superblock construction

Voltage bin calibration based on a voltage distribution reference v...

Memory sub-system using partial superblocks

Source address memory managment

Adaptive block mapping

Reactive read based on metrics to screen defect prone memory blocks

Managing storage of multiple plane parity data in a memory sub-system

L2P translation techniques in limited RAM systems to increase rando...

Managing workload of programming sets of pages to memory device

Managing error-handling flows in memory devices

Memory sub-system data migration

Using incomplete super blocks for increased write performance

Media management on power-up

Voltage bin calibration based on a temporary voltage shift offset

Multi-tier threshold voltage offset bin calibration

Read error recovery

Memory device virtual blocks using half good blocks

Prioritization of error control operations at a memory sub-system

Partial superblock memory management

Grown bad block management in a memory sub-system

Multi-page parity protection with power loss handling

Managing error-handling flows in memory devices

Asynchronous power loss impacted data structure

Patents Applicationslast 30 patents

MEMORY SUB-SYSTEM FOR MONITORING MIXED MODE BLOCKS

DETERMINING OFFSETS FOR MEMORY READ OPERATIONS

MANAGING ALLOCATION OF HALF GOOD BLOCKS

VIRTUAL INDEXING IN A MEMORY DEVICE

DYNAMIC SUPERBLOCK CONSTRUCTION

PROGRAMMING ERASE BLOCKS COUPLED TO A SAME STRING

ADAPTIVE BLOCK MAPPING

VOLTAGE BIN CALIBRATION BASED ON A VOLTAGE DISTRIBUTION REFERENCE V...

SOURCE ADDRESS MEMORY MANAGMENT

DISTURB TRACKING AMONG MULTIPLE ERASE BLOCKS COUPLED TO A SAME STRING

READ DISTURB TRACKING AMONG MULTIPLE ERASE BLOCKS COUPLED TO A SAME...

DETERMINING OFFSETS FOR MEMORY READ OPERATIONS

SUPER BLOCK MANAGEMENT FOR EFFICIENT UTILIZATION

ADAPTIVE BLOCK MAPPING

MANAGING ERROR-HANDLING FLOWS IN MEMORY DEVICES

MEMORY SUB-SYSTEM USING PARTIAL SUPERBLOCKS

VOLTAGE BIN CALIBRATION BASED ON A VOLTAGE DISTRIBUTION REFERENCE V...

SOURCE ADDRESS MEMORY MANAGMENT

USING INCOMPLETE SUPER BLOCKS FOR INCREASED WRITE PERFORMANCE

MEMORY SUB-SYSTEM DATA MIGRATION

MANAGING WORKLOAD OF PROGRAMMING SETS OF PAGES TO MEMORY DEVICE

VOLTAGE CALIBRATION SCANS TO REDUCE MEMORY DEVICE OVERHEAD

PARITY PROTECTION IN NON-VOLATILE MEMORY

DYNAMIC SUPERBLOCK CONSTRUCTION

MEMORY SUB-SYSTEM USING PARTIAL SUPERBLOCKS

MANAGING ERROR-HANDLING FLOWS IN MEMORY DEVICES

MEMORY SUB-SYSTEM DATA MIGRATION

MEMORY DEVICE VIRTUAL BLOCKS USING HALF GOOD BLOCKS

L2P TRANSLATION TECHNIQUES IN LIMITED RAM SYSTEMS TO INCREASE RANDO...

MEMORY SUB-SYSTEM FOR MONITORING MIXED MODE BLOCKS