Xiao Sun

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Adaptive prefetcher for shared system cache
- Patent number 11,994,993
- Issue date May 28, 2024
- NXP B.V.
- Xiao Sun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performance monitor for interconnection network in an integrated ci...
- Patent number 11,520,725
- Issue date Dec 6, 2022
- NXP USA, INC.
- Yuan Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware, software and algorithm to precisely predict performance o...
- Patent number 10,891,071
- Issue date Jan 12, 2021
- NXP USA, INC.
- Yuan Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System architecture method and apparatus for adaptive hardware faul...
- Patent number 10,495,691
- Issue date Dec 3, 2019
- NXP USA, INC.
- Xiao Sun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit design verification through forced clock glitches
- Patent number 9,043,737
- Issue date May 26, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Jayanta Bahadra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for generation of pipeline hazard test sequences
- Patent number 6,772,370
- Issue date Aug 3, 2004
- FREESCALE SEMICONDUCTOR, INC.
- Xiao Sun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for pipeline hazard detection
- Patent number 6,751,759
- Issue date Jun 15, 2004
- FREESCALE SEMICONDUCTOR, INC.
- Xiao Sun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for testing finite state machine (FSM) conform...
- Patent number 6,282,681
- Issue date Aug 28, 2001
- Motorola, Inc.
- Xiao Sun
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for constructing test subsequence graphs utili...
- Patent number 6,004,027
- Issue date Dec 21, 1999
- Motorola Inc.
- Xiao Sun
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for constructing verification test sequences b...
- Patent number 5,796,752
- Issue date Aug 18, 1998
- Motorola, Inc.
- Xiao Sun
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for constructing verification test sequences b...
- Patent number 5,703,885
- Issue date Dec 30, 1997
- Motorola, Inc.
- Xiao Sun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for merging hierarchical test subsequence and...
- Patent number 5,630,051
- Issue date May 13, 1997
- Motorola Inc.
- Xiao Sun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for constructing unique input/output sequence...
- Patent number 5,555,270
- Issue date Sep 10, 1996
- Motorola Inc.
- Xiao Sun
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
ADAPTIVE PREFETCHER FOR SHARED SYSTEM CACHE
- Publication number 20230297507
- Publication date Sep 21, 2023
- NXP B.V.
- Xiao Sun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERFORMANCE MONITOR FOR INTERCONNECTION NETWORK IN AN INTEGRATED CI...
- Publication number 20210357347
- Publication date Nov 18, 2021
- NXP USA, Inc.
- Yuan Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hardware, Software and Algorithm to Precisely Predict Performance o...
- Publication number 20190354308
- Publication date Nov 21, 2019
- NXP USA, Inc.
- Yuan Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System Architecture Method and Apparatus for Adaptive Hardware Faul...
- Publication number 20190250210
- Publication date Aug 15, 2019
- NXP USA, Inc.
- Xiao Sun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated Circuit Design Verification Through Forced Clock Glitches
- Publication number 20140325463
- Publication date Oct 30, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Jayanta Bahadra
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Adaptive prefetcher for shared system cache

Performance monitor for interconnection network in an integrated ci...

Hardware, software and algorithm to precisely predict performance o...

System architecture method and apparatus for adaptive hardware faul...

Integrated circuit design verification through forced clock glitches

Method and apparatus for generation of pipeline hazard test sequences

Method and apparatus for pipeline hazard detection

Method and apparatus for testing finite state machine (FSM) conform...

Method and apparatus for constructing test subsequence graphs utili...

Method and apparatus for constructing verification test sequences b...

Method and apparatus for constructing verification test sequences b...

Method and apparatus for merging hierarchical test subsequence and...

Method and apparatus for constructing unique input/output sequence...

Patents Applicationslast 30 patents

ADAPTIVE PREFETCHER FOR SHARED SYSTEM CACHE

PERFORMANCE MONITOR FOR INTERCONNECTION NETWORK IN AN INTEGRATED CI...

Hardware, Software and Algorithm to Precisely Predict Performance o...

System Architecture Method and Apparatus for Adaptive Hardware Faul...

Integrated Circuit Design Verification Through Forced Clock Glitches