Xiaobing LEE

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Wear-leveling method for cross-point memory for multiple data tempe...
- Patent number 11,556,462
- Issue date Jan 17, 2023
- FutureWei Technologies, Inc.
- Xiangyu Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transaction-based hybrid memory
- Patent number 11,449,445
- Issue date Sep 20, 2022
- FutureWei Technologies, Inc.
- Xiaobing Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for utilizing DDR4-DRAM chips in hybrid DDR5-DI...
- Patent number 10,628,343
- Issue date Apr 21, 2020
- FutureWei Technologies, Inc.
- Xiaobing Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transaction-based hybrid memory
- Patent number 10,579,560
- Issue date Mar 3, 2020
- FutureWei Technologies, Inc.
- Xiaobing Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid LPDDR4-DRAM with cached NVM and flash-NAND in multi-chip pac...
- Patent number 10,453,501
- Issue date Oct 22, 2019
- FutureWei Technologies, Inc.
- Xiaobing Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
RDMA-SSD dual-port unified memory and network controller
- Patent number 10,453,530
- Issue date Oct 22, 2019
- FutureWei Technologies, Inc.
- Xiaobing Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transaction identification synchronization
- Patent number 10,127,074
- Issue date Nov 13, 2018
- FutureWei Technologies, Inc.
- Xiaobing Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
All-flash-array primary storage and caching appliances implementing...
- Patent number 10,042,565
- Issue date Aug 7, 2018
- FutureWei Technologies, Inc.
- Xiaobing Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Hybrid LPDDR4-DRAM with cached NVM and flash-nand in multi-chip pac...
- Patent number 9,940,980
- Issue date Apr 10, 2018
- FutureWei Technologies, Inc.
- Xiaobing Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
DDR4-SSD dual-port DIMM device
- Patent number 9,887,008
- Issue date Feb 6, 2018
- FutureWei Technologies, Inc.
- Xiaobing Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Dual-port DDR4-DIMMs of SDRAM and NVRAM for SSD-blades and multi-CP...
- Patent number 9,852,779
- Issue date Dec 26, 2017
- FutureWei Technologies, Inc.
- Xiaobing Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods of vector-DMA cache-XOR for MPCC erasure coding
- Patent number 9,571,125
- Issue date Feb 14, 2017
- FutureWei Technologies, Inc.
- Xiaobing Lee
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
TRANSACTION-BASED HYBRID MEMORY
- Publication number 20200192841
- Publication date Jun 18, 2020
- FutureWei Technologies, Inc.
- Xiaobing Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSACTION IDENTIFICATION SYNCHRONIZATION
- Publication number 20190065237
- Publication date Feb 28, 2019
- FutureWei Technologies, Inc.
- Xiaobing Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LBA EVICTION IN PCM MEDIA
- Publication number 20190012259
- Publication date Jan 10, 2019
- FutureWei Technologies, Inc.
- Xiangyu Tang
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEMS AND METHODS FOR UTILIZING DDR4-DRAM CHIPS IN HYBRID DDR5-DI...
- Publication number 20180225235
- Publication date Aug 9, 2018
- FutureWei Technologies, Inc.
- Xiaobing LEE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSACTION IDENTIFICATION SYNCHRONIZATION
- Publication number 20180219562
- Publication date Aug 2, 2018
- FutureWei Technologies, Inc.
- Xiaobing Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID LPDDR4-DRAM WITH CACHED NVM AND FLASH-NAND IN MULTI-CHIP PAC...
- Publication number 20180197584
- Publication date Jul 12, 2018
- FutureWei Technologies, Inc.
- Xiaobing Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSACTION-BASED HYBRID MEMORY
- Publication number 20180059966
- Publication date Mar 1, 2018
- FutureWei Technologies, Inc.
- Xiaobing Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Wear-Leveling Method for Cross-Point Memory for Multiple Data Tempe...
- Publication number 20180060227
- Publication date Mar 1, 2018
- FutureWei Technologies, Inc.
- Xiangyu Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID LPDDR4-DRAM WITH CACHED NVM AND FLASH-NAND IN MULTI-CHIP PAC...
- Publication number 20180005670
- Publication date Jan 4, 2018
- FutureWei Technologies, Inc.
- Xiaobing Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Unified Memory Bus and Method to Operate the Unified Memory Bus
- Publication number 20160232112
- Publication date Aug 11, 2016
- FutureWei Technologies, Inc.
- Xiaobing LEE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALL-FLASH-ARRAY PRIMARY STORAGE AND CACHING APPLIANCES IMPLEMENTING...
- Publication number 20160110126
- Publication date Apr 21, 2016
- FutureWei Technologies, Inc.
- Xiaobing LEE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DDR4-ONFI SSD 1-TO-N BUS ADAPTATION AND EXPANSION CONTROLLER
- Publication number 20150261446
- Publication date Sep 17, 2015
- FutureWei Technologies, Inc.
- Xiaobing LEE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DUAL-PORT DDR4-DIMMS OF SDRAM AND NVRAM FOR SSD-BLADES AND MULTI-CP...
- Publication number 20150262633
- Publication date Sep 17, 2015
- FutureWei Technologies, Inc.
- Xiaobing LEE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RDMA-SSD DUAL-PORT UNIFIED MEMORY AND NETWORK CONTROLLER
- Publication number 20150254003
- Publication date Sep 10, 2015
- FutureWei Technologies, Inc.
- Xiaobing LEE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DDR4-SSD DUAL-PORT DIMM DEVICE
- Publication number 20150255130
- Publication date Sep 10, 2015
- FutureWei Technologies, Inc.
- Xiaobing LEE
- G11 - INFORMATION STORAGE
Information Patent Application
Systems and Methods of Vector-DMA cache-XOR for MPCC Erasure Coding
- Publication number 20150100860
- Publication date Apr 9, 2015
- FutureWei Technologies, Inc.
- Xiaobing Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Flex Erasure Coding of Controllers of Primary Hard Disk Drives Cont...
- Publication number 20150089328
- Publication date Mar 26, 2015
- FutureWei Technologies, Inc.
- Xiaobing Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Media-Aware File System and Method
- Publication number 20150088943
- Publication date Mar 26, 2015
- FutureWei Technologies, Inc.
- Xudong Song
- G06 - COMPUTING CALCULATING COUNTING

Xiaobing LEE

Person

Patents Grantslast 30 patents

Wear-leveling method for cross-point memory for multiple data tempe...

Transaction-based hybrid memory

Systems and methods for utilizing DDR4-DRAM chips in hybrid DDR5-DI...

Transaction-based hybrid memory

Hybrid LPDDR4-DRAM with cached NVM and flash-NAND in multi-chip pac...

RDMA-SSD dual-port unified memory and network controller

Transaction identification synchronization

All-flash-array primary storage and caching appliances implementing...

Hybrid LPDDR4-DRAM with cached NVM and flash-nand in multi-chip pac...

DDR4-SSD dual-port DIMM device

Dual-port DDR4-DIMMs of SDRAM and NVRAM for SSD-blades and multi-CP...

Systems and methods of vector-DMA cache-XOR for MPCC erasure coding

Patents Applicationslast 30 patents

TRANSACTION-BASED HYBRID MEMORY

TRANSACTION IDENTIFICATION SYNCHRONIZATION

LBA EVICTION IN PCM MEDIA

SYSTEMS AND METHODS FOR UTILIZING DDR4-DRAM CHIPS IN HYBRID DDR5-DI...

TRANSACTION IDENTIFICATION SYNCHRONIZATION

HYBRID LPDDR4-DRAM WITH CACHED NVM AND FLASH-NAND IN MULTI-CHIP PAC...

TRANSACTION-BASED HYBRID MEMORY

Wear-Leveling Method for Cross-Point Memory for Multiple Data Tempe...

HYBRID LPDDR4-DRAM WITH CACHED NVM AND FLASH-NAND IN MULTI-CHIP PAC...

Unified Memory Bus and Method to Operate the Unified Memory Bus

ALL-FLASH-ARRAY PRIMARY STORAGE AND CACHING APPLIANCES IMPLEMENTING...

DDR4-ONFI SSD 1-TO-N BUS ADAPTATION AND EXPANSION CONTROLLER

DUAL-PORT DDR4-DIMMS OF SDRAM AND NVRAM FOR SSD-BLADES AND MULTI-CP...

RDMA-SSD DUAL-PORT UNIFIED MEMORY AND NETWORK CONTROLLER

DDR4-SSD DUAL-PORT DIMM DEVICE

Systems and Methods of Vector-DMA cache-XOR for MPCC Erasure Coding

Flex Erasure Coding of Controllers of Primary Hard Disk Drives Cont...

Media-Aware File System and Method