Xiaogang Qiu

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Techniques for efficiently transferring data to a processor
- Patent number 11,907,717
- Issue date Feb 20, 2024
- NVIDIA Corporation
- Andrew Kerr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance synchronization mechanisms for coordinating operat...
- Patent number 11,803,380
- Issue date Oct 31, 2023
- NVIDIA Corporation
- Olivier Giroux
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for efficiently transferring data to a processor
- Patent number 11,604,649
- Issue date Mar 14, 2023
- NVIDIA Corporation
- Andrew Kerr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Unified cache for diverse memory traffic
- Patent number 11,347,668
- Issue date May 31, 2022
- NVIDIA Corporation
- Xiaogang Qiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for efficiently transferring data to a processor
- Patent number 11,080,051
- Issue date Aug 3, 2021
- NVIDIA Corporation
- Andrew Kerr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Unified cache for diverse memory traffic
- Patent number 10,705,994
- Issue date Jul 7, 2020
- NVIDIA Corporation
- Xiaogang Qiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical staging areas for scheduling threads for execution
- Patent number 10,489,200
- Issue date Nov 26, 2019
- NVIDIA Corporation
- Olivier Giroux
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Unified cache for diverse memory traffic
- Patent number 10,459,861
- Issue date Oct 29, 2019
- NVIDIA Corporation
- Xiaogang Qiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for performing shaped memory access operations
- Patent number 10,255,228
- Issue date Apr 9, 2019
- NVIDIA Corporation
- Xiaogang Qiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method to control cache replacement for decoupled data fetch
- Patent number 9,971,699
- Issue date May 15, 2018
- NVIDIA Corporation
- Ronny Meir Krashinsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Speculative execution and rollback
- Patent number 9,830,158
- Issue date Nov 28, 2017
- NVIDIA Corporation
- Jack Hilaire Choquette
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reordering buffer for memory access locality
- Patent number 9,798,544
- Issue date Oct 24, 2017
- NVIDIA Corporation
- Olivier Giroux
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shaped register file reads
- Patent number 9,626,191
- Issue date Apr 18, 2017
- NVIDIA Corporation
- Jack Hilaire Choquette
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, method, and computer program product for implementing softw...
- Patent number 9,612,836
- Issue date Apr 4, 2017
- NVIDIA Corporation
- Robert Ohannessian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for resolving thread divergences
- Patent number 9,606,808
- Issue date Mar 28, 2017
- NVIDIA Corporation
- Jack Choquette
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, method, and computer program product for implementing multi...
- Patent number 9,477,482
- Issue date Oct 25, 2016
- NVIDIA Corporation
- Xiaogang Qiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and processor that include an implementation of decoupled pi...
- Patent number 9,471,307
- Issue date Oct 18, 2016
- NVIDIA Corporation
- Olivier Giroux
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reordering operands assigned to each one of read request ports conc...
- Patent number 8,533,435
- Issue date Sep 10, 2013
- NVIDIA Corporation
- Xiaogang Qiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
ECC bits used as additional register file storage
- Patent number 8,321,761
- Issue date Nov 27, 2012
- NVIDIA Corporation
- Fred Gruner
- G11 - INFORMATION STORAGE
Information Patent Grant
ECC bits used as additional register file storage
- Patent number 8,250,439
- Issue date Aug 21, 2012
- NVIDIA Corporation
- Fred Gruner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing a grid storage system
- Patent number 7,484,039
- Issue date Jan 27, 2009
- Xiaogang Qiu
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
TECHNIQUES FOR EFFICIENTLY TRANSFERRING DATA TO A PROCESSOR
- Publication number 20230185570
- Publication date Jun 15, 2023
- NVIDIA Corporation
- Andrew Kerr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR EFFICIENTLY TRANSFERRING DATA TO A PROCESSOR
- Publication number 20210326137
- Publication date Oct 21, 2021
- NVIDIA Corporation
- Andrew Kerr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH PERFORMANCE SYNCHRONIZATION MECHANISMS FOR COORDINATING OPERAT...
- Publication number 20210124627
- Publication date Apr 29, 2021
- NVIDIA Corporation
- Olivier GIROUX
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR EFFICIENTLY TRANSFERRING DATA TO A PROCESSOR
- Publication number 20210124582
- Publication date Apr 29, 2021
- NVIDIA Corporation
- Andrew Kerr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UNIFIED CACHE FOR DIVERSE MEMORY TRAFFIC
- Publication number 20200401541
- Publication date Dec 24, 2020
- NVIDIA Corporation
- Xiaogang QIU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UNIFIED CACHE FOR DIVERSE MEMORY TRAFFIC
- Publication number 20180322078
- Publication date Nov 8, 2018
- NVIDIA Corporation
- Xiaogang QIU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UNIFIED CACHE FOR DIVERSE MEMORY TRAFFIC
- Publication number 20180322077
- Publication date Nov 8, 2018
- NVIDIA Corporation
- Xiaogang QIU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD TO CONTROL CACHE REPLACEMENT FOR DECOUPLED DATA FETCH
- Publication number 20170322887
- Publication date Nov 9, 2017
- NVIDIA Corporation
- Ronny Meir Krashinsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR IMPLEMENTING SOFTW...
- Publication number 20150220341
- Publication date Aug 6, 2015
- NVIDIA Corporation
- Robert Ohannessian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND PROCESSOR THAT INCLUDE AN IMPLEMENTATION OF DECOUPLED PI...
- Publication number 20150193272
- Publication date Jul 9, 2015
- NVIDIA Corporation
- Olivier Giroux
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIERARCHICAL STAGING AREAS FOR SCHEDULING THREADS FOR EXECUTION
- Publication number 20150113538
- Publication date Apr 23, 2015
- NVIDIA Corporation
- Olivier GIROUX
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR IMPLEMENTING MULTI...
- Publication number 20150089202
- Publication date Mar 26, 2015
- NVIDIA Corporation
- Xiaogang Qiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REORDERING BUFFER FOR MEMORY ACCESS LOCALITY
- Publication number 20140164743
- Publication date Jun 12, 2014
- NVIDIA Corporation
- Olivier GIROUX
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and System for Resolving Thread Divergences
- Publication number 20130179662
- Publication date Jul 11, 2013
- Jack CHOQUETTE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHAPED REGISTER FILE READS
- Publication number 20130166877
- Publication date Jun 27, 2013
- Jack Hilaire CHOQUETTE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR PERFORMING SHAPED MEMORY ACCESS OPERATIONS
- Publication number 20130145124
- Publication date Jun 6, 2013
- Xiaogang Qiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPECULATIVE EXECUTION AND ROLLBACK
- Publication number 20130117541
- Publication date May 9, 2013
- Jack Hilaire CHOQUETTE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Unified Collector Structure for Multi-Bank Register File
- Publication number 20110072243
- Publication date Mar 24, 2011
- Xiaogang Qiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for implementing a grid storage system
- Publication number 20060277363
- Publication date Dec 7, 2006
- Xiaogang Qiu
- G06 - COMPUTING CALCULATING COUNTING

Xiaogang Qiu

Person

Patents Grantslast 30 patents

Techniques for efficiently transferring data to a processor

High performance synchronization mechanisms for coordinating operat...

Techniques for efficiently transferring data to a processor

Unified cache for diverse memory traffic

Techniques for efficiently transferring data to a processor

Unified cache for diverse memory traffic

Hierarchical staging areas for scheduling threads for execution

Unified cache for diverse memory traffic

System and method for performing shaped memory access operations

Method to control cache replacement for decoupled data fetch

Speculative execution and rollback

Reordering buffer for memory access locality

Shaped register file reads

System, method, and computer program product for implementing softw...

Method and system for resolving thread divergences

System, method, and computer program product for implementing multi...

System and processor that include an implementation of decoupled pi...

Reordering operands assigned to each one of read request ports conc...

ECC bits used as additional register file storage

ECC bits used as additional register file storage

Method and apparatus for implementing a grid storage system

Patents Applicationslast 30 patents

TECHNIQUES FOR EFFICIENTLY TRANSFERRING DATA TO A PROCESSOR

TECHNIQUES FOR EFFICIENTLY TRANSFERRING DATA TO A PROCESSOR

HIGH PERFORMANCE SYNCHRONIZATION MECHANISMS FOR COORDINATING OPERAT...

TECHNIQUES FOR EFFICIENTLY TRANSFERRING DATA TO A PROCESSOR

UNIFIED CACHE FOR DIVERSE MEMORY TRAFFIC

UNIFIED CACHE FOR DIVERSE MEMORY TRAFFIC

UNIFIED CACHE FOR DIVERSE MEMORY TRAFFIC

METHOD TO CONTROL CACHE REPLACEMENT FOR DECOUPLED DATA FETCH

SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR IMPLEMENTING SOFTW...

SYSTEM AND PROCESSOR THAT INCLUDE AN IMPLEMENTATION OF DECOUPLED PI...

HIERARCHICAL STAGING AREAS FOR SCHEDULING THREADS FOR EXECUTION

SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR IMPLEMENTING MULTI...

REORDERING BUFFER FOR MEMORY ACCESS LOCALITY

Method and System for Resolving Thread Divergences

SHAPED REGISTER FILE READS

SYSTEM AND METHOD FOR PERFORMING SHAPED MEMORY ACCESS OPERATIONS

SPECULATIVE EXECUTION AND ROLLBACK

Unified Collector Structure for Multi-Bank Register File

Method and apparatus for implementing a grid storage system