Xiaoqing Xu

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Inter-tier power delivery network (PDN) for dense gate-on-gate 3D l...
- Patent number 12,176,293
- Issue date Dec 24, 2024
- Tokyo Electron Limited
- Lars Liebmann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for power measurement in electronic circuit de...
- Patent number 11,959,950
- Issue date Apr 16, 2024
- ARM Limited
- Xiaoqing Xu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tier backside power delivery network for dense gate-on-gate 3...
- Patent number 11,830,852
- Issue date Nov 28, 2023
- Tokyo Electron Limited
- Lars Liebmann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for on-chip power metering using automated sel...
- Patent number 11,726,116
- Issue date Aug 15, 2023
- ARM Limited
- Xiaoqing Xu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
TSV coupled integrated circuits and methods
- Patent number 11,569,219
- Issue date Jan 31, 2023
- ARM Limited
- Rahul Mathur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatuses for concurrent coupling of inter-tier conne...
- Patent number 11,455,454
- Issue date Sep 27, 2022
- ARM Limited
- Chien-Ju Chao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dielet design techniques
- Patent number 11,295,053
- Issue date Apr 5, 2022
- ARM Limited
- Xiaoqing Xu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, system and circuit for multi-die timing signal distribution
- Patent number 11,228,316
- Issue date Jan 18, 2022
- ARM Limited
- Xiaoqing Xu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tier co-placement for integrated circuitry
- Patent number 11,120,191
- Issue date Sep 14, 2021
- ARM Limited
- Xiaoqing Xu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-die integrated circuits with improved testability
- Patent number 10,825,745
- Issue date Nov 3, 2020
- ARM Limited
- Saurabh Pijuskumar Sinha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer implemented system and method for generating a layout of a...
- Patent number 10,796,053
- Issue date Oct 6, 2020
- ARM Limited
- Paul de Dood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tier co-placement for integrated circuitry
- Patent number 10,599,806
- Issue date Mar 24, 2020
- ARM Limited
- Xiaoqing Xu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer implemented system and method for generating a layout of a...
- Patent number 10,083,269
- Issue date Sep 25, 2018
- ARM Limited
- Paul De Dood
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
TSV Coupled Integrated Circuits and Methods
- Publication number 20230178538
- Publication date Jun 8, 2023
- ARM Limited
- Rahul Mathur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INVERTED TOP-TIER FET FOR MULTI-TIER GATE-ON-GATE 3-DIMENSION INTEG...
- Publication number 20220271033
- Publication date Aug 25, 2022
- Daniel CHANEMOUGAME
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTER-TIER POWER DELIVERY NETWORK (PDN) FOR DENSE GATE-ON-GATE 3D L...
- Publication number 20220181263
- Publication date Jun 9, 2022
- Lars LIEBMANN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-TIER BACKSIDE POWER DELIVERY NETWORK FOR DENSE GATE-ON-GATE 3...
- Publication number 20220181300
- Publication date Jun 9, 2022
- Lars LIEBMANN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERDIGITATED DEVICE STACK
- Publication number 20220181318
- Publication date Jun 9, 2022
- Lars LIEBMANN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND APPARATUS FOR POWER MEASUREMENT IN ELECTRONIC CIRCUIT DE...
- Publication number 20220164511
- Publication date May 26, 2022
- ARM Limited
- Xiaoqing Xu
- G01 - MEASURING TESTING
Information Patent Application
Methods and Apparatuses for Concurrent Coupling of Inter-Tier Conne...
- Publication number 20220164513
- Publication date May 26, 2022
- ARM Limited
- Chien-Ju Chao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR ON-CHIP POWER METERING USING AUTOMATED SEL...
- Publication number 20220163576
- Publication date May 26, 2022
- ARM Limited
- Xiaoqing Xu
- G01 - MEASURING TESTING
Information Patent Application
TSV Coupled Integrated Circuits and Methods
- Publication number 20220130816
- Publication date Apr 28, 2022
- ARM Limited
- Rahul Mathur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIELET DESIGN TECHNIQUES
- Publication number 20210081508
- Publication date Mar 18, 2021
- ARM Limited
- Xiaoqing Xu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, SYSTEM AND CIRCUIT FOR MULTI-DIE TIMING SIGNAL DISTRIBUTION
- Publication number 20210028788
- Publication date Jan 28, 2021
- ARM Limited
- Xiaoqing Xu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Tier Co-Placement for Integrated Circuitry
- Publication number 20200218845
- Publication date Jul 9, 2020
- ARM Limited
- Xiaoqing Xu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Tier Co-Placement for Integrated Circuitry
- Publication number 20190303523
- Publication date Oct 3, 2019
- ARM Limited
- Xiaoqing Xu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Computer Implemented System and Method for Generating a Layout of a...
- Publication number 20190026417
- Publication date Jan 24, 2019
- ARM Limited
- Paul de Dood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTER IMPLEMENTED SYSTEM AND METHOD FOR GENERATING A LAYOUT OF A...
- Publication number 20180225402
- Publication date Aug 9, 2018
- ARM Limited
- Paul DE DOOD
- G06 - COMPUTING CALCULATING COUNTING

Xiaoqing Xu

Person

Patents Grantslast 30 patents

Inter-tier power delivery network (PDN) for dense gate-on-gate 3D l...

Method and apparatus for power measurement in electronic circuit de...

Multi-tier backside power delivery network for dense gate-on-gate 3...

Method and apparatus for on-chip power metering using automated sel...

TSV coupled integrated circuits and methods

Methods and apparatuses for concurrent coupling of inter-tier conne...

Dielet design techniques

Method, system and circuit for multi-die timing signal distribution

Multi-tier co-placement for integrated circuitry

Multi-die integrated circuits with improved testability

Computer implemented system and method for generating a layout of a...

Multi-tier co-placement for integrated circuitry

Computer implemented system and method for generating a layout of a...

Patents Applicationslast 30 patents

TSV Coupled Integrated Circuits and Methods

INVERTED TOP-TIER FET FOR MULTI-TIER GATE-ON-GATE 3-DIMENSION INTEG...

INTER-TIER POWER DELIVERY NETWORK (PDN) FOR DENSE GATE-ON-GATE 3D L...

MULTI-TIER BACKSIDE POWER DELIVERY NETWORK FOR DENSE GATE-ON-GATE 3...

INTERDIGITATED DEVICE STACK

METHOD AND APPARATUS FOR POWER MEASUREMENT IN ELECTRONIC CIRCUIT DE...

Methods and Apparatuses for Concurrent Coupling of Inter-Tier Conne...

METHOD AND APPARATUS FOR ON-CHIP POWER METERING USING AUTOMATED SEL...

TSV Coupled Integrated Circuits and Methods

DIELET DESIGN TECHNIQUES

METHOD, SYSTEM AND CIRCUIT FOR MULTI-DIE TIMING SIGNAL DISTRIBUTION

Multi-Tier Co-Placement for Integrated Circuitry

Multi-Tier Co-Placement for Integrated Circuitry

Computer Implemented System and Method for Generating a Layout of a...

COMPUTER IMPLEMENTED SYSTEM AND METHOD FOR GENERATING A LAYOUT OF A...