XIAOWEI TIAN

Person

ESSEX JUCTION, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Junction field effect transistor structure with P-type silicon germ...
- Patent number 8,921,172
- Issue date Dec 30, 2014
- International Business Machines Corporation
- Xuefeng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Asymmetric wedge JFET, related method and design structure
- Patent number 8,779,476
- Issue date Jul 15, 2014
- International Business Machines Corporation
- Xuefeng Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Junction field effect transistor structure with P-type silicon germ...
- Patent number 8,754,455
- Issue date Jun 17, 2014
- International Business Machines Corporation
- Xuefeng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Asymmetric wedge JFET, related method and design structure
- Patent number 8,481,380
- Issue date Jul 9, 2013
- International Business Machines Corporation
- Xuefeng Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Diffusion resistor/capacitor (DRC) non-aligned MOSFET structure
- Patent number 6,838,323
- Issue date Jan 4, 2005
- International Business Machines Corporation
- Robert J. Gauthier
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reliable diffusion resistor and diffusion capacitor
- Patent number 6,100,153
- Issue date Aug 8, 2000
- International Business Machines Corporation
- Edward J. Nowak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device fabrication method and apparatus using connect...
- Patent number 6,097,068
- Issue date Aug 1, 2000
- International Business Machines Corporation
- Jeffrey Scott Brown
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device fabrication method using connecting implants
- Patent number 6,057,184
- Issue date May 2, 2000
- International Business Machines Corporation
- Jeffrey Scott Brown
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making a noise-isolated buried resistor by implanting a f...
- Patent number 6,057,204
- Issue date May 2, 2000
- International Business Machines Corporation
- Edward J. Nowak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method or forming self-aligned halo-isolated wells
- Patent number 5,972,745
- Issue date Oct 26, 1999
- International Business Machines Corporation
- Howard L. Kalter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Noise-isolated buried resistor
- Patent number 5,883,566
- Issue date Mar 16, 1999
- International Business Machines Corporation
- Edward J. Nowak
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
JUNCTION FIELD EFFECT TRANSISTOR STRUCTURE WITH P-TYPE SILICON GERM...
- Publication number 20140235021
- Publication date Aug 21, 2014
- International Business Machines Corporation
- Xuefeng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ASYMMETRIC WEDGE JFET, RELATED METHOD AND DESIGN STRUCTURE
- Publication number 20130299881
- Publication date Nov 14, 2013
- International Business Machines Corporation
- Xuefeng Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
JUNCTION FIELD EFFECT TRANSISTOR STRUCTURE WITH P-TYPE SILICON GERM...
- Publication number 20120168820
- Publication date Jul 5, 2012
- International Business Machines Corporation
- Xuefeng Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ASYMMETRIC WEDGE JFET, RELATED METHOD AND DESIGN STRUCTURE
- Publication number 20120074469
- Publication date Mar 29, 2012
- International Business Machines Corporation
- Xuefeng Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Diffusion resistor/capacitor (DRC) non-aligned MOSFET structure
- Publication number 20030102513
- Publication date Jun 5, 2003
- International Business Machines Corporation
- Robert J. Gauthier
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIFFUSION RESISTOR/CAPACITOR (DRC) NON-ALIGNED MOSFET STRUCTURE
- Publication number 20020060343
- Publication date May 23, 2002
- ROBERT J. GAUTHIER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND DEVICE TO INCREASE LATCH-UP IMMUNITY IN CMOS DEVICE
- Publication number 20010011758
- Publication date Aug 9, 2001
- JEFFREY S BROWN
- H01 - BASIC ELECTRIC ELEMENTS

XIAOWEI TIAN

Person

Patents Grantslast 30 patents

Junction field effect transistor structure with P-type silicon germ...

Asymmetric wedge JFET, related method and design structure

Junction field effect transistor structure with P-type silicon germ...

Asymmetric wedge JFET, related method and design structure

Diffusion resistor/capacitor (DRC) non-aligned MOSFET structure

Reliable diffusion resistor and diffusion capacitor

Semiconductor device fabrication method and apparatus using connect...

Semiconductor device fabrication method using connecting implants

Method of making a noise-isolated buried resistor by implanting a f...

Method or forming self-aligned halo-isolated wells

Noise-isolated buried resistor

Patents Applicationslast 30 patents

JUNCTION FIELD EFFECT TRANSISTOR STRUCTURE WITH P-TYPE SILICON GERM...

ASYMMETRIC WEDGE JFET, RELATED METHOD AND DESIGN STRUCTURE

JUNCTION FIELD EFFECT TRANSISTOR STRUCTURE WITH P-TYPE SILICON GERM...

ASYMMETRIC WEDGE JFET, RELATED METHOD AND DESIGN STRUCTURE

Diffusion resistor/capacitor (DRC) non-aligned MOSFET structure

DIFFUSION RESISTOR/CAPACITOR (DRC) NON-ALIGNED MOSFET STRUCTURE

METHOD AND DEVICE TO INCREASE LATCH-UP IMMUNITY IN CMOS DEVICE